Sat Garcia's Top Recommendations

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	Toward efficient and robust software speculative parallelization on multiprocessors [My Copy] In PPoPP '03: Proceedings of the ninth ACM SIGPLAN symposium on Principles and practice of parallel programming (2003), pp. 13-24. by Marcelo Cintra, Diego R. Llanos posted by 4 people mbaluda dominik-g lfwgoes sverker
	The PARSEC benchmark suite: characterization and architectural implications [My Copy] In PACT '08: Proceedings of the 17th international conference on Parallel architectures and compilation techniques (2008), pp. 72-81. by Christian Bienia, Sanjeev Kumar, Jaswinder P. Singh, Kai Li posted by 1 person lfwgoes
	Design Space Exploration of a Software Speculative Parallelization Scheme [My Copy] IEEE Trans. Parallel Distrib. Syst., Vol. 16, No. 6. (2005), pp. 562-576. posted by 1 person lfwgoes
	Conversion of control dependence to data dependence [My Copy] In POPL '83: Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages (1983), pp. 177-189. by J. R. Allen, Ken Kennedy, Carrie Porterfield, Joe Warren posted by 1 person iammealva
	OneChip: An FPGA Processor with Reconfigurable Logic [My Copy] In IEEE Symposium on {FPGA}s for Custom Computing Machines (1996), pp. 126-135. by R. Wittig, P. Chow edited by Kenneth L. Pocek, Jeffrey Arnold posted by 1 person iammealva
	CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit [My Copy] In ISCA (2000), pp. 225-235. by Zhi A. Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee posted by 1 person iammealva
	Instruction-Level Parallelism for Reconfigurable Computing [My Copy] In Field-Programmable Logic: From FPGAs to Computing Paradigm (/ 1998), pp. 248-257. by Timothy J. Callahan, John Wawrzynek edited by Reiner W. Hartenstein, Andres Keevallik posted by 1 person iammealva
	DISC: the dynamic instruction set computer [My Copy] In Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. {SPIE} 2607 (1995), pp. 92-103. by M. J. Wirthlin, B. L. Hutchings edited by John Schewel posted by 1 person iammealva
	MOVE: a framework for high-performance processor design [My Copy] In Supercomputing '91: Proceedings of the 1991 ACM/IEEE conference on Supercomputing (1991), pp. 692-701. by Henk Corporaal, Hans posted by 2 people visit0r iammealva
	Designing domain-specific processors [My Copy] In CODES '01: Proceedings of the ninth international symposium on Hardware/software codesign (2001), pp. 61-66. by Marnix Arnold, Henk Corporaal posted by 1 person iammealva
	Effective compiler support for predicated execution using the hyperblock [My Copy] In 25th Annual International Symposium on Microarchitecture (1992) by S. A. Mahlke, D. C. Lin, W. Y. Chen, R. E. Hank, R. A. Bringmann posted by 2 people iammealva bunge
	Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization [My Copy] In MICRO 37: Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture (2004), pp. 30-40. by Nathan Clark, Manjunath Kudlur, Hyunchul Park, Scott Mahlke, Krisztian Flautner posted by 3 people iammealva CompArch Compilers
	Efficient instruction encoding for automatic instruction set design of configurable ASIPs [My Copy] In ICCAD '02: Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design (2002), pp. 649-654. by Jong-Eun Lee, Kiyoung Choi, Nikil Dutt posted by 3 people iammealva CompArch Compilers
	Exploiting forwarding to improve data bandwidth of instruction-set extensions [My Copy] In DAC '06: Proceedings of the 43rd annual conference on Design automation (2006), pp. 43-48. by Ramkumar Jayaseelan, Haibin Liu, Tulika Mitra posted by 3 people iammealva CompArch Compilers
	Scalable custom instructions identification for instruction-set extensible processors [My Copy] In CASES '04: Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems (2004), pp. 69-78. by Pan Yu, Tulika Mitra posted by 3 people iammealva CompArch Compilers
	Fast Identification of Custom Instructions for Extensible Processors [My Copy] Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 26, No. 2. (2007), pp. 359-368. by X. Chen, D. L. Maskell, Y. Sun posted by 5 people iammealva nominolo Aragorn992 CompArch Compilers
	Instruction-set-extension exploration using decomposable heuristic search [My Copy] VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on (2006), 6 pp.. by S. Das, P. P. Chakrabarti, P. Dasgupta posted by 3 people iammealva CompArch Compilers
	An efficient approach to custom instruction set generation [My Copy] Embedded and Real-Time Computing Systems and Applications, 2005. Proceedings. 11th IEEE International Conference on (2005), pp. 547-550. by Guangwei Zou, Xiang Liu posted by 3 people iammealva CompArch Compilers
	An architecture framework for transparent instruction set customization in embedded processors [My Copy] Computer Architecture, 2005. ISCA '05. Proceedings. 32nd International Symposium on (2005), pp. 272-283. by N. Clark, J. Blome, M. Chu, S. Mahlke, S. Biles, K. Flautner posted by 3 people iammealva CompArch Compilers
	Fast instruction set customization [My Copy] Embedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004. 2nd Workshop on (2004), pp. 53-58. by E. Borin, F. Klein, N. Moreano, R. Azevedo, G. Araujo posted by 3 people iammealva CompArch Compilers
	A design flow for configurable embedded processors based on optimized instruction set extension synthesis [My Copy] In DATE '06: Proceedings of the conference on Design, automation and test in Europe (2006), pp. 581-586. by R. Leupers, K. Karuri, S. Kraemer, M. Pandey posted by 3 people iammealva CompArch Compilers
	Battery-aware instruction generation for embedded processors [My Copy] In ASP-DAC '05: Proceedings of the 2005 conference on Asia South Pacific design automation (2005), pp. 553-556. by Newton Cheung, Sri Parameswaran, J&\#246;rg Henkel posted by 3 people iammealva CompArch Compilers
	Automatic selection of application-specific instruction-set extensions [My Copy] In CODES+ISSS '06: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis (2006), pp. 160-165. by Carlo Galuzzi, Elena M. Panainte, Yana Yankova, Koen Bertels, Stamatis Vassiliadis posted by 3 people iammealva CompArch Compilers
	Instruction set extension with shadow registers for configurable processors [My Copy] In FPGA '05: Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays (2005), pp. 99-106. by Jason Cong, Yiping Fan, Guoling Han, Ashok Jagannathan, Glenn Reinman, Zhiru Zhang posted by 3 people iammealva CompArch Compilers
	Feedback driven instruction-set extension [My Copy] In LCTES '04: Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems (2004), pp. 126-135. by Uwe Kastens, Dinh K. Le, Adrian Slowik, Michael Thies posted by 3 people iammealva CompArch Compilers
	Code transformation strategies for extensible embedded processors [My Copy] In CASES '06: Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems (2006), pp. 242-252. by Paolo Bonzini, Laura Pozzi posted by 4 people iammealva CompArch Compilers visit0r
	An integer linear programming approach for identifying instruction-set extensions [My Copy] In CODES+ISSS '05: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis (2005), pp. 172-177. by Kubilay Atasu, G&\#252;nhan D&\#252;ndar, Can &\#214;zturan posted by 3 people iammealva CompArch Compilers
	Efficient instruction scheduling for a pipelined architecture [My Copy] In SIGPLAN '86: Proceedings of the 1986 SIGPLAN symposium on Compiler construction (1986), pp. 11-16. by Philip B. Gibbons, Steven S. Muchnick posted by 4 people visit0r iammealva CompArch Compilers
	A comparison of list schedules for parallel processing systems [My Copy] Commun. ACM, Vol. 17, No. 12. (December 1974), pp. 685-690. by Thomas L. Adam, K. M. Chandy, J. R. Dickson posted by 4 people iammealva CompArch Compilers ppschedule
	Iterative modulo scheduling: an algorithm for software pipelining loops [My Copy] In MICRO 27: Proceedings of the 27th annual international symposium on Microarchitecture (1994), pp. 63-74. by B. Ramakrishna Rau posted by 6 people BYU CHREC B1 2009 iammealva greenShell CompArch Compilers visit0r
	$My PDF &\#214;zer_98_unified.pdf$ Unified assign and schedule: a new approach to scheduling for clustered register file microarchitectures [My Copy] In MICRO 31: Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture (1998), pp. 308-315. by Emre &\#214;zer, Sanjeev Banerjia, Thomas M. Conte posted by 3 people iammealva CompArch Compilers
	$My PDF s&\#225;nchez_00_instruction.pdf$ Instruction scheduling for clustered VLIW architectures [My Copy] In ISSS '00: Proceedings of the 13th international symposium on System synthesis (2000), pp. 41-46. by Jes&\#250;s S&\#225;nchez, Antonio Gonz&\#225;lez posted by 3 people iammealva CompArch Compilers
	FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths [My Copy] In CGO '04: Proceedings of the international symposium on Code generation and optimization (2004) by Manjunath Kudlur, Kevin Fan, Michael Chu, Rajiv Ravindran, Nathan Clark, Scott Mahlke posted by 3 people iammealva CompArch Compilers
	A High-Performance Microarchitecture with Hardware-Programmable Functional Units [My Copy] In Proceedings of the 27th Annual International Symposium on Microarchitecture (1994), pp. 172-80. by R. Razdan, M. D. Smith posted by 3 people gferencz iammealva nikomatsakis
	Garp: A MIPS Processor with a Reconfigurable Coprocessor [My Copy] In IEEE Symposium on {FPGA}s for Custom Computing Machines (1997), pp. 12-21. by John R. Hauser, John Wawrzynek edited by Kenneth L. Pocek, Jeffrey Arnold posted by 2 people iammealva nikomatsakis
	Exploiting pipelining to relax register-file port constraints of instruction-set extensions [My Copy] In CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems (2005), pp. 2-10. by Laura Pozzi, Paolo Ienne posted by 4 people iammealva nominolo CompArch Compilers
	Reconfigurable computing: a survey of systems and software [My Copy] ACM Comput. Surv., Vol. 34, No. 2. (June 2002), pp. 171-210. by Katherine Compton, Scott Hauck posted by 17 people ericschung anallam hannibal_08 mzabidi sonofnel peskin iammealva Seenu clarence mmuecke silvangraf smithmc periodic RC_FCU Reconfigurable Computing hn82123 infolab, USTC
	Lessons learned at 208K: towards debugging millions of cores [My Copy] In SC '08: Proceedings of the 2008 ACM/IEEE conference on Supercomputing (2008), pp. 1-9. by Gregory L. Lee, Dong H. Ahn, Dorian C. Arnold, et al.Bronis R. de Supinski, Matthew Legendre, Barton P. Miller, Martin Schulz, Ben Liblit posted by 2 people yoavtock mbaluda
	Test case generation from formal models through abstraction refinement and model checking [My Copy] In A-MOST '07: Proceedings of the 3rd international workshop on Advances in model-based testing (2007), pp. 85-94. by Manoranjan Satpathy, S. Ramesh posted by 1 person mbaluda
	A general compiler framework for speculative multithreading [My Copy] In SPAA '02: Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures (2002), pp. 99-108. by Anasua Bhowmik, Manoj Franklin posted by 1 person mbaluda
	The Barrier Synchronization Impact on the MPI-Programs Performance Using a Cluster of Workstations [My Copy] In ISPAN '97: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (1997), 429. by Martha Torres, Sergio T. Kofuji posted by 1 person mbaluda
	Barrier matching for programs with textually unaligned barriers [My Copy] In PPoPP '07: Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming (2007), pp. 194-204. by Yuan Zhang, Evelyn Duesterwald posted by 1 person mbaluda
	Formal analysis for mpi-based high performance computing software [My Copy] (2007) by Robert L. Palmer posted by 1 person mbaluda
	A Formal Approach to Detect Functionally Irrelevant Barriers in MPI Programs [My Copy] In Proceedings of the 15th European PVM/MPI Users' Group Meeting on Recent Advances in Parallel Virtual Machine and Message Passing Interface (2008), pp. 265-273. by Subodh Sharma, Sarvani Vakkalanka, Ganesh Gopalakrishnan, Robert M. Kirby, Rajeev Thakur, William Gropp posted by 1 person mbaluda
	An Expert Assistant for Computer Aided Parallelization [My Copy] Applied Parallel Computing (2006), pp. 665-674. by Gabriele Jost, Robert Chun, Haoqiang Jin, Jesus Labarta, Judit Gimenez posted by 1 person mbaluda
	Generating OpenMP code using an interactive parallelization environment [My Copy] Parallel Computing, Vol. 31, No. 10-12. (October 2005), pp. 999-1012. by C. Ierotheou, H. Jin, G. Matthews, S. Johnson, R. Hood posted by 1 person mbaluda
	An integrated compilation and performance analysis environment for data parallel programs [My Copy] In Supercomputing '95: Proceedings of the 1995 ACM/IEEE conference on Supercomputing (CDROM) (1995), 50. by Vikram S. Adve, John M. Crummey, Mark Anderson, Jhy C. Wang, Daniel A. Reed, Ken Kennedy posted by 1 person mbaluda
	Development and Implementation of an Interactive Parallelization Assistance Tool for OpenMP: iPat/OMP [My Copy] IEICE Trans Inf Syst, Vol. E89-D, No. 2. (1 February 2006), pp. 399-407. by Makoto Ishihara, Hiroki Honda, Mitsuhisa Sato posted by 1 person mbaluda
	Can software engineering solve the HPCS problem? [My Copy] In SE-HPCS '05: Proceedings of the second international workshop on Software engineering for high performance computing system applications (2005), pp. 27-31. by Eugene Loh, Michael L. Van De Vanter, Lawrence G. Votta posted by 1 person mbaluda
	HPC needs a tool strategy [My Copy] In SE-HPCS '05: Proceedings of the second international workshop on Software engineering for high performance computing system applications (2005), pp. 55-59. by Michael L. Van De Vanter, D. E. Post, Mary E. Zosel posted by 1 person mbaluda
	Second international workshop on software engineering for high performance computing system applications [My Copy] In ICSE '05: Proceedings of the 27th international conference on Software engineering (2005), pp. 683-683. by Philip M. Johnson posted by 1 person mbaluda
	Workshop on Software Engineering for High Performance Computing System (HPCS) Applications [My Copy] In ICSE '04: Proceedings of the 26th International Conference on Software Engineering (2004), 772. by Philip Johnson posted by 1 person mbaluda
	Scheduling considerations for building dynamic verification tools for MPI [My Copy] In PADTAD '08: Proceedings of the 6th workshop on Parallel and distributed systems (2008), pp. 1-6. by Sarvani Vakkalanka, Michael Delisi, Ganesh Gopalakrishnan, Robert M. Kirby posted by 1 person mbaluda
	Parallel Programmer Productivity: A Case Study of Novice Parallel Programmers [My Copy] In SC '05: Proceedings of the 2005 ACM/IEEE conference on Supercomputing (2005), 35. by Lorin Hochstein, Jeff Carver, Forrest Shull, Sima Asgari, Victor Basili posted by 1 person mbaluda
	Parallel Programmability and the Chapel Language [My Copy] Int. J. High Perform. Comput. Appl., Vol. 21, No. 3. (2007), pp. 291-312. by B. L. Chamberlain, D. Callahan, H. P. Zima posted by 1 person mbaluda
	Developing a Computational Science IDE for HPC Systems [My Copy] In SE-HPC '07: Proceedings of the 3rd International Workshop on Software Engineering for High Performance Computing Applications (2007), 5. by David E. Hudak, Neil Ludban, Vijay Gadepally, Ashok Krishnamurthy posted by 1 person mbaluda
	Effective random testing of concurrent programs [My Copy] In ASE '07: Proceedings of the twenty-second IEEE/ACM international conference on Automated software engineering (2007), pp. 323-332. by Koushik Sen posted by 1 person mbaluda
	The role of MPI in development time: a case study [My Copy] In SC '08: Proceedings of the 2008 ACM/IEEE conference on Supercomputing (2008), pp. 1-10. by Lorin Hochstein, Forrest Shull, Lynn B. Reid posted by 1 person mbaluda
	A Software Chasm: Software Engineering and Scientific Computing [My Copy] IEEE Softw., Vol. 24, No. 6. (2007), pp. 120-119. by Diane F. Kelly posted by 1 person mbaluda
	Finite-state verification for high performance computing [My Copy] In SE-HPCS '05: Proceedings of the second international workshop on Software engineering for high performance computing system applications (2005), pp. 68-72. by George S. Avrunin, Stephen F. Siegel, Andrew R. Siegel posted by 1 person mbaluda
	Runtime verification methods for MPI [My Copy] Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on In Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on (2008), pp. 1-5. by G. L. Gopalakrishnan, R. M. Kirby posted by 1 person mbaluda
	Exploiting speculative thread-level parallelism on a SMT processor [My Copy] High-Performance Computing and Networking (1999), pp. 754-763. by Pedro Marcuello, Antonio González posted by 1 person mbaluda
	Understanding the High-Performance-Computing Community: A Software Engineer's Perspective [My Copy] IEEE Software In Software, IEEE, Vol. 25, No. 4. (2008), pp. 29-36. by Victor R. Basili, Jeffrey C. Carver, Daniela Cruzes, et al.Lorin M. Hochstein, Jeffrey K. Hollingsworth, Forrest Shull, Marvin V. Zelkowitz posted by 3 people kistijantoro mbaluda pipitone
	Heuristics for Scalable Dynamic Test Generation [My Copy] In ASE (2008), pp. 443-446. by Jacob Burnim, Koushik Sen posted by 1 person mbaluda
	Interprocedual data flow testing [My Copy] In TAV3: Proceedings of the ACM SIGSOFT '89 third symposium on Software testing, analysis, and verification (1989), pp. 158-167. by Mary J. Harrold, Mary L. Soffa posted by 1 person mbaluda
	Testing, abstraction, theorem proving: better together! [My Copy] In ISSTA '06: Proceedings of the 2006 international symposium on Software testing and analysis (2006), pp. 145-156. by Greta Yorsh, Thomas Ball, Mooly Sagiv posted by 1 person mbaluda
	Proofs from tests [My Copy] In ISSTA '08: Proceedings of the 2008 international symposium on Software testing and analysis (2008), pp. 3-14. by Nels E. Beckman, Aditya V. Nori, Sriram K. Rajamani, Robert J. Simmons posted by 2 people robertjohnsimmons mbaluda
	Distilling Free-Form Natural Laws from Experimental Data [My Copy] Science, Vol. 324, No. 5923. (3 April 2009), pp. 81-85. by Michael Schmidt, Hod Lipson posted by 37 people vgauthier marcio tomhebbron cjryan CulCog Shirakawa doncieux ocs mbaluda tomweingarten leliavski dpf davidcsterratt ansobol Scis0000002 dimatura phoenixzxl dullhunk muraken katiehumphry sebwills xtizon tyrell_turing subhacom sen_cheng coela uhland qwermish VGreiff Benja stober behindtherabbit Fortran deanmalmgren fgibson neils jbhiatt
	Counterexample Guided Abstraction Refinement Via Program Execution [My Copy] Formal Methods and Software Engineering (2004), pp. 224-238. by Daniel Kroening, Alex Groce, Edmund Clarke posted by 2 people mbaluda srccheck
	High Performance Development for High End Computing With Python Language Wrapper (PLW) [My Copy] International Journal of High Performance Computing Applications, Vol. 21, No. 3. (1 August 2007), pp. 360-369. by Piotr Luszczek, Jack Dongarra posted by 2 people mbaluda yungyuc
	Combining symbolic execution with model checking to verify parallel numerical programs [My Copy] ACM Trans. Softw. Eng. Methodol., Vol. 17, No. 2. (April 2008), pp. 1-34. by Stephen F. Siegel, Anastasia Mironova, George S. Avrunin, Lori A. Clarke posted by 3 people mbaluda coolcapri leonardo
	Software Testing and Analysis: Process, Principles and Techniques [My Copy] (13 April 2007) by Mauro Pezze, Michal Young posted by 4 people thiers20 mbaluda nigno sjgaller
	SYNERGY: a new algorithm for property checking [My Copy] In SIGSOFT '06/FSE-14: Proceedings of the 14th ACM SIGSOFT international symposium on Foundations of software engineering (2006), pp. 117-127. by Bhargav S. Gulavani, Thomas A. Henzinger, Yamini Kannan, Aditya V. Nori, Sriram K. Rajamani posted by 3 people robertjohnsimmons mbaluda NSumner
	CUTE: a concolic unit testing engine for C [My Copy] In ESEC/FSE-13: Proceedings of the 10th European software engineering conference held jointly with 13th ACM SIGSOFT international symposium on Foundations of software engineering (2005), pp. 263-272. by Koushik Sen, Darko Marinov, Gul Agha posted by 3 people mbaluda HaraldBrandl NSumner
	Software Development Environments for Scientific and Engineering Software: A Series of Case Studies [My Copy] In ICSE '07: Proceedings of the 29th International Conference on Software Engineering (2007), pp. 550-559. by Jeffrey C. Carver, Richard P. Kendall, Susan E. Squires, Douglass E. Post posted by 3 people mbaluda pipitone egh
	The STAMPede approach to thread-level speculation [My Copy] ACM Trans. Comput. Syst., Vol. 23, No. 3. (August 2005), pp. 253-300. by Gregory J. Steffan, Christopher Colohan, Antonia Zhai, Todd C. Mowry posted by 2 people mbaluda sverker
	DART: directed automated random testing [My Copy] In PLDI '05: Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation, Vol. 40, No. 6. (June 2005), pp. 213-223. by Patrice Godefroid, Nils Klarlund, Koushik Sen posted by 15 people bulwahn mbaluda qdw1987 jolilius bec newdawn pfrancis sjgaller Context-driven-testers TUCS-ES_Lab Desgin-by-Contract ahgharaibeh joaoarthurbm bfraser cyph3r
	The Jrpm system for dynamically parallelizing Java programs [My Copy] In ISCA '03: Proceedings of the 30th annual international symposium on Computer architecture, Vol. 31, No. 2. (May 2003), pp. 434-446. by Michael K. Chen, Kunle Olukotun posted by 3 people mbaluda mig29x sby
	$My PDF qui&\#241;ones_05_mitosis.pdf$ Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices [My Copy] In PLDI '05: Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation, Vol. 40, No. 6. (June 2005), pp. 269-279. by Carlos G. Qui&\#241;ones, Carlos Madriles, Jes&\#250;s S&\#225;nchez, Pedro Marcuello, Antonio Gonz&\#225;lez, Dean M. Tullsen posted by 4 people mbaluda qiongc ko1 eraman
	Shared-memory performance profiling [My Copy] In PPOPP '97: Proceedings of the sixth ACM SIGPLAN symposium on Principles and practice of parallel programming (1997), pp. 240-251. by Zhichen Xu, James R. Larus, Barton P. Miller posted by 1 person dschuff
	MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging [My Copy] High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on In High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on (2007), pp. 273-284. by G. Venkataramani, B. Roemer, Y. Solihin, M. Prvulovic posted by 1 person dschuff
	HARD: Hardware-Assisted Lockset-based Race Detection [My Copy] High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on In High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on (2007), pp. 121-132. by Pin Zhou, R. Teodorescu, Yuanyuan Zhou posted by 1 person dschuff
	Spatial Memory Streaming [My Copy] In ISCA '06: Proceedings of the 33rd annual international symposium on Computer Architecture (2006), pp. 252-263. by Stephen Somogyi, Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos posted by 1 person dschuff
	An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches [My Copy] In ASPLOS-X: Proceedings of the 10th international conference on Architectural support for programming languages and operating systems (2002), pp. 211-222. by Changkyu Kim, Doug Burger, Stephen W. Keckler posted by 2 people dschuff mamadoudiao
	Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications [My Copy] ACM Transactions on Computer Systems, Vol. 16, No. 2. (1998), pp. 170-205. by Mark Horowitz, Margaret Martonoisi, Todd C. Mowry, Michael D. Smith posted by 1 person dschuff
	Informing Loads: Enabling Software to Observe and React to Memory Behavior [My Copy] No. CSL-TR-95-673. (1995) by Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith posted by 1 person dschuff
	Carbon: architectural support for fine-grained parallelism on chip multiprocessors [My Copy] SIGARCH Comput. Archit. News In ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture, Vol. 35, No. 2. (2007), pp. 162-173. by Sanjeev Kumar, Christopher J. Hughes, Anthony Nguyen posted by 3 people walteryhli dschuff qiongcai
	Design Alternatives for a High-Performance Self-Securing Ethernet Network Interface [My Copy] Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International (2007), pp. 1-10. by Derek L. Schuff, Vijay S. Pai posted by 1 person dschuff
	Mondrian Memory Protection [My Copy] In Proceedings of ASPLOS-X (Oct 2002) by E. Witchel, J. Cates, Krste Asanovic posted by 1 person dschuff
	PALS: Peer-to-Peer Adaptive Layered Streaming [My Copy] by R. Rejaie, A. Ortega posted by 4 people wuwenhung sora dschuff babyone
	Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads [My Copy] High-Performance Computer Architecture, 2006. The Twelfth International Symposium on (27 February 2006), pp. 88-98. by A. Jaleel, M. Mattina, B. Jacob posted by 2 people parnell dschuff
	Trace-driven workload simulation method for Multiprocessor System-On-Chips [My Copy] In DAC '09: Proceedings of the 46th Annual Design Automation Conference (2009), pp. 232-237. by Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Toshio Isomura, Kazuo Satou
	MPTLsim: a simulator for X86 multicore processors [My Copy] In DAC '09: Proceedings of the 46th Annual Design Automation Conference (2009), pp. 226-231. by Hui Zeng, Matt Yourst, Kanad Ghose, Dmitry Ponomarev posted by 1 person xiongfei
	Exploiting parallelism and structure to accelerate the simulation of chip multi-processors [My Copy] High-Performance Computer Architecture, 2006. The Twelfth International Symposium on (27 February 2006), pp. 29-40. by D. A. Penry, D. Fay, D. Hodgdon, et al.R. Wells, G. Schelle, D. I. August, D. Connors
	Exploring parallelizations of applications for MPSoC platforms using MPA [My Copy] Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09. In Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09. (2009), pp. 1148-1153. by R. Baert, E. Brockmeyer, S. Wuytack, T. J. Ashby
	Factored operating systems (fos): the case for a scalable operating system for multicores [My Copy] SIGOPS Oper. Syst. Rev., Vol. 43, No. 2. (2009), pp. 76-85. by David Wentzlaff, Anant Agarwal
	Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines [My Copy] Principles of Advanced and Distributed Simulation, 2009. PADS '09. ACM/IEEE/SCS 23rd Workshop on In Principles of Advanced and Distributed Simulation, 2009. PADS '09. ACM/IEEE/SCS 23rd Workshop on (2009), pp. 80-87. by P. Ezudheen, P. Chandran, J. Chandra, B. P. Simon, D. Ravi posted by 1 person chengyangfu
	MPA: Parallelizing an Application onto a Multicore Platform Made Easy [My Copy] Micro, IEEE In Micro, IEEE, Vol. 29, No. 3. (2009), pp. 31-39. by J. Y. Mignolet, R. Baert, T. J. Ashby, P. Avasare, Hye-On Jang, Jae C. Son posted by 1 person cmn
	An agent based general solution model for the course timetabling problem [My Copy] In AAMAS '06: Proceedings of the fifth international joint conference on Autonomous agents and multiagent systems (2006), pp. 1430-1432. by Yan Yang, Raman Paranjape, Luigi Benedicenti
	A Tabu search heuristic with efficient diversification strategies for the class/teacher timetabling problem [My Copy] J. Exp. Algorithmics, Vol. 10 (2005) by Haroldo G. Santos, Luiz S. Ochi, Marcone J. F. Souza