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	Memory segmentation to exploit sleep mode operation [My Copy] In DAC '95: Proceedings of the 32nd annual ACM/IEEE Design Automation Conference (1995), pp. 36-41. by Amir H. Farrahi, Gustavo E. Téllez, Majid Sarrafzadeh posted to memory low-power by leosteinfeld on 2009-11-26 23:26:48 as
	Static Minimization of Total Energy Consumption in Memory Subsystem for Scratchpad-Based Systems-on-Chips [My Copy] Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 17, No. 2. (09 January 2009), pp. 161-171. by F. Menichelli, M. Olivieri posted to low-power by leosteinfeld on 2009-11-16 23:25:40 as
	Leakage-aware energy synchronization for wireless sensor networks [My Copy] In MobiSys '09: Proceedings of the 7th international conference on Mobile systems, applications, and services (2009), pp. 319-332. by Ting Zhu, Ziguo Zhong, Yu Gu, Tian He, Zhi L. Zhang posted to sensor-network low-power by leosteinfeld on 2009-11-16 23:21:11 as
	Leakage aware design for next generation's SOCs [My Copy] ASIC, 2007. ASICON '07. 7th International Conference on (25 October 2007), pp. 1332-1332. by R. Zafalon posted to paper-dac low-power by leosteinfeld on 2009-11-16 22:46:15 as
	Memory Architectures for Embedded Systems-On-Chip [My Copy] High Performance Computing — HiPC 2002 (2002), pp. 647-662. by Preeti Ranjan Panda, Nikil Dutt posted to paper-dac memory low-power by leosteinfeld on 2009-11-15 21:23:01 as
	Data and memory optimization techniques for embedded systems [My Copy] ACM Trans. Des. Autom. Electron. Syst., Vol. 6, No. 2. (April 2001), pp. 149-206. by P. R. Panda, F. Catthoor, N. D. Dutt, et al.K. Danckaert, E. Brockmeyer, C. Kulkarni, A. Vandercappelle, P. G. Kjeldsberg posted to paper-dac low-power by leosteinfeld on 2009-11-15 21:21:51 as along with 1 person mmuecke
	Leakage current: Moore's law meets static power [My Copy] Computer, Vol. 36, No. 12. (19 December 2003), pp. 68-75. by N. S. Kim, T. Austin, D. Baauw, et al.T. Mudge, K. Flautner, J. S. Hu, M. J. Irwin, M. Kandemir, V. Narayanan posted to paper-dac low-power by leosteinfeld on 2009-11-15 21:20:17 as along with 1 person Pepijn
	Energy-aware compilation and hardware design for VLIW embedded systems [My Copy] International Journal of Embedded Systems, Vol. 3, No. 1. (1 January 2007), pp. 73-82. by Jose L. Ayala, Marisa Lopez-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest posted to paper-dac memory low-power by leosteinfeld on 2009-11-15 18:57:47 as
	Improving the Efficiency of Memory Partitioning by Address Clustering [My Copy] In DATE '03: Proceedings of the conference on Design, Automation and Test in Europe (2003), 10018. by Alberto Macii, Enrico Macii, Massimo Poncino posted to paper-dac memory low-power by leosteinfeld on 2009-11-15 15:53:21 as
	Low-Power Processors and Systems on Chips [My Copy] (2005) by Christian Piguet posted to paper-dac memory low-power by leosteinfeld on 2009-11-15 15:20:58 as
	Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits [My Copy] Circuits and Systems I: Regular Papers, IEEE Transactions on, Vol. 56, No. 9. (02 December 2008), pp. 1979-1993. by A. Calimera, L. Benini, A. Macii, E. Macii, M. Poncino posted to low-power by leosteinfeld on 2009-10-27 22:47:10 as
	Ultranarrow-Linewidth, Efficient Amplification of Low-Power Seed Sources by a Fiber Amplifier [My Copy] Appl. Opt., Vol. 38, No. 9. (20 March 1999), pp. 1784-1787. by Remus Nicolaescu, Thomas Walther, Edward S. Fry, Martin Muendel posted to single-frequency seeding narrow low-power linewidth fiber amplifier by michaelbussmann on 2009-08-25 18:30:24 as
	A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network [My Copy] Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on In Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, Vol. 1 (2000), pp. 56-59 vol.1. by A. S. Porret, T. Melly, C. C. Enz, E. A. Vittoz posted to a architecture distributed for low-power low-voltage network sensors suitable transceiver wireless by yuanfangchen on 2009-04-11 10:22:35 as
	Advances in Ultra-Low-Voltage Design [My Copy] Solid-State Circuits Newsletter, IEEE In Solid-State Circuits Newsletter, IEEE, Vol. 13, No. 4. (20 February 2009), pp. 20-27. by Joyce Kwong, Anantha P. Chandrakasan posted to cmos low-power low-voltage by philip-eecs on 2009-03-18 08:49:58 as along with 1 person phlip
	A generic interface chip for capacitive sensors in low-power multi-parameter microsystems [My Copy] Sensors and Actuators A: Physical, Vol. 84, No. 3. (1 September 2000), pp. 351-361. by N. Yazdi, A. Mason, K. Najafi, K. D. Wise posted to capacitive-sensor interface low-power microsystems by ingedwar on 2008-10-30 07:24:22 as
	Flash storage memory [My Copy] Commun. ACM, Vol. 51, No. 7. (2008), pp. 47-51. by Adam Leventhal posted to cache flash low-power by mamadoudiao on 2008-09-13 00:24:45 as along with 5 people sachingarg ashwinn Origen dmeister shehjart
	A low power layered decoding architecture for LDPC decoder implementation for IEEE 802.11n LDPC codes [My Copy] In ISLPED '08: Proceeding of the thirteenth international symposium on Low power electronics and design (2008), pp. 253-258. by Jie Jin, Chi Y. Tsui posted to 80211n ldpc low-power threshold by eamador to the group Flexible decoders @ Eurecom on 2008-09-11 11:14:58 as along with 1 person andey
	Low-power CMOS digital design [My Copy] Solid-State Circuits, IEEE Journal of In Solid-State Circuits, IEEE Journal of, Vol. 27, No. 4. (06 August 2002), pp. 473-484. by A. P. Chandrakasan, S. Sheng, R. W. Brodersen posted to cmos low-power by philip-eecs on 2008-06-30 11:44:10 as along with 2 people phlip hannibal_07
	A Precompensation Algorithm for PWM-Based Digital Audio Amplifiers for Portable Applications [My Copy] Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on In Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on (2007), pp. 1577-1580. by Xiaoxiang Gong, J. G. Harris posted to amplifier low-power pwm by ChrisMorrison on 2008-01-04 12:48:08 as
	Power estimation for high level synthesis [My Copy] Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on (1993), pp. 361-366. by P. E. Landman, J. M. Rabaey posted to low-power power-estimation by ceegrs2 on 2006-12-07 15:45:38 as
	Dynamic voltage scaling for commercial FPGAs [My Copy] Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on (2005), pp. 173-180. by C. T. Chow, L. S. M. Tsui, P. H. W. Leong, W. Luk, S. J. E. Wilton posted to fpga low-power voltage-scaling by ceegrs2 on 2006-12-03 15:14:16 as along with 2 people nathalie reactgary
	Flip-flop insertion with shifted-phase clocks for FPGA power reduction [My Copy] In ICCAD '05: Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design (2005), pp. 335-342. by Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck Chang posted to fpga glitching low-power pipelining by ceegrs2 on 2006-12-03 14:52:44 as
	Reducing the power consumption of FPGAs through retiming [My Copy] Engineering of Computer-Based Systems, 2005. ECBS '05. 12th IEEE International Conference and Workshops on the In Engineering of Computer-Based Systems, 2005. ECBS '05. 12th IEEE International Conference and Workshops on the (2005), pp. 89-94. by R. Fischer, K. Buchenrieder, U. Nageldinger posted to fpga glitching low-power retiming by ceegrs2 on 2006-12-03 14:15:03 as
	The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays [My Copy] Lecture Notes in Computer Science : Field Programmable Logic and Application In Lecture Notes in Computer Science : Field Programmable Logic and Application (2004), pp. 719-728. by Steven J. E. Wilton, Su-Shin Ang, Wayne Luk posted to fpga glitching low-power pipelining by ceegrs2 on 2006-12-03 12:42:09 as
	Low-pass filter for computing the transition density in digital circuits [My Copy] Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 13, No. 9. (1994), pp. 1123-1131. by F. N. Najm posted to low-power power-estimation by ceegrs2 on 2006-12-01 16:28:28 as
	On the interaction between power-aware FPGA CAD Algorithms [My Copy] Computer Aided Design, 2003. ICCAD-2003. International Conference on In Computer Aided Design, 2003. ICCAD-2003. International Conference on (2003), pp. 701-708. by J. Lamoureux, S. J. E. Wilton posted to cad fpga low-power by ceegrs2 on 2006-12-01 15:03:59 as
	Power-aware RAM mapping for FPGA embedded memory blocks [My Copy] In FPGA'06: Proceedings of the internation symposium on Field programmable gate arrays (2006), pp. 189-198. by Russell Tessier, Vaughn Betz, David Neto, Thiagaraja Gopalsamy posted to fpga low-power ram by ceegrs2 on 2006-11-29 13:17:52 as along with 1 person nathalie
	FPGA power reduction using configurable dual-Vdd [My Copy] Design Automation Conference, 2004. Proceedings. 41st In Design Automation Conference, 2004. Proceedings. 41st (2004), pp. 735-740. by Fei Li, Yan Lin, Lei He posted to dual-vdd fpga glanced low-power by ceegrs2 on 2006-11-28 21:42:07 as along with 1 person nathalie
	Architecture evaluation for power-efficient FPGAs [My Copy] In FPGA '03: Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays (2003), pp. 175-184. by Fei Li, Deming Chen, Lei He, Jason Cong posted to architecture fpga low-power by ceegrs2 on 2006-11-28 20:12:26 as
	Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability [My Copy] In FPGA '05: Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays (2005), pp. 199-207. by Yan Lin, Fei Li, Lei He posted to dual-vdd fpga low-power by ceegrs2 on 2006-11-27 20:21:48 as
	Power estimation techniques for FPGAs [My Copy] Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 12, No. 10. (2004), pp. 1015-1027. by J. H. Anderson, F. N. Najm posted to fpga low-power power-estimation by ceegrs2 on 2006-11-27 19:38:10 as along with 1 person nathalie
	Dynamic clock management for low power applications in FPGAs [My Copy] Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000 (2000), pp. 139-142. by I. Brynjolfson, Z. Zilic posted to fpga low-power by ceegrs2 on 2006-11-27 15:55:17 as
	Dynamic power consumption in Virtex-II FPGA family [My Copy] In FPGA '02: Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays (2002), pp. 157-164. by Li Shang, Alireza S. Kaviani, Kusuma Bathala posted to dynamic fpga low-power by ceegrs2 on 2006-11-27 13:43:27 as along with 2 people NickGasson nathalie
	Power modeling and characteristics of field programmable gate arrays [My Copy] Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 24, No. 11. (2005), pp. 1712-1724. by Fei Li, Y. Lin, Lei He, Deming Chen, J. Cong posted to fpga low-power power-estimation by ceegrs2 on 2006-11-27 11:03:23 as along with 1 person nathalie
	Conditional techniques for low power consumption flip-flops [My Copy] Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, Vol. 2 (2001), pp. 803-806 vol.2. by N. Nedovic, M. Aleksic, V. G. Oklobdzija posted to flip flops low-power by alagor on 2006-11-26 16:43:07 as
	Conditional-capture flip-flop for statistical power reduction [My Copy] Solid-State Circuits, IEEE Journal of, Vol. 36, No. 8. (2001), pp. 1263-1271. by Bai-Sun Kong, Sam-Soo Kim, Young-Hyun Jun posted to flip flops low-power by alagor on 2006-11-26 16:40:17 as
	New clock-gating techniques for low-power flip-flops [My Copy] Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on (2000), pp. 114-119. by A. G. M. Strollo, E. Napoli, D. De Caro posted to consumption flip flops low-power power by alagor on 2006-11-26 14:57:37 as
	Active leakage power optimization for FPGAs [My Copy] Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 25, No. 3. (2006), pp. 423-437. by J. H. Anderson, F. N. Najm posted to cad fpga leakage low-power by ceegrs2 on 2006-11-23 16:27:11 as along with 1 person nathalie
	Partitioned state encoding for low power in FPGAs [My Copy] Electronics Letters, Vol. 41, No. 17. (2005), pp. 948-949. by L. Mengibar, L. Entrena, M. G. Lorenz, E. S. Millan posted to fpga low-power by ceegrs2 on 2006-11-23 09:55:45 as
	Power and performance analysis of motion estimation based on hardware and software realizations [My Copy] Computers, IEEE Transactions on, Vol. 54, No. 6. (2005), pp. 714-726. by S. Yang, W. Wolf, N. Vijaykrishnan posted to algorithm comparison low-power motion-estimation by ceegrs2 on 2006-11-20 11:01:29 as
	Reconfiguration for power saving in real-time motion estimation [My Copy] Acoustics, Speech, and Signal Processing, 1998. ICASSP '98. Proceedings of the 1998 IEEE International Conference on, Vol. 5 (1998), pp. 3037-3040 vol.5. by S. R. Park, W. Burleson posted to adaptive-search-area fpga low-power motion-estimation reconfiguration by ceegrs2 on 2006-10-27 10:55:53 as
	Low-power systolic array processor architecture for FSBM video motion estimation [My Copy] Electronics Letters, Vol. 42, No. 20. (2006), pp. 1146-1147. by M. Jiang, D. Crookes, S. Davidson, R. Turner posted to architecture full-search low-power motion-estimation sad-early-termination systolic by ceegrs2 on 2006-10-26 13:43:21 as
	Clock-Gating in FPGAs: A Novel and Comparative Evaluation [My Copy] Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on In Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on (2006), pp. `584-590. by Yan Zhang, J. Roivainen, A. Mammela posted to asic design-techniques fpga low-power by ceegrs2 on 2006-10-24 17:24:35 as
	A 90nm low-power FPGA for battery-powered applications [My Copy] In FPGA'06: Proceedings of the internation symposium on Field programmable gate arrays (2006), pp. 3-11. by Tim Tuan, Sean Kao, Arif Rahman, Satyaki Das, Steve Trimberger posted to architecture fpga low-power by ceegrs2 on 2006-10-23 15:40:36 as along with 1 person nathalie
	FPGA vs. ASIC for low power applications [My Copy] Microelectronics Journal, Vol. 37, No. 8. (August 2006), pp. 669-677. by Amara Amara, Frederic Amiel, Thomas Ea posted to asic comparison fpga low-power by ceegrs2 on 2006-10-23 13:39:03 as
	An ultra-low energy microcontroller for Smart Dust wireless sensor networks [My Copy] Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International (2004), pp. 316-317 Vol.1. by B. A. Warneke, K. S. J. Pister posted to low-power microcontroller by summerxia on 2006-09-22 17:29:28 as along with 1 person mkarpelson
	An ultra-low-power digitally-controlled buck converter IC for cellular phone applications [My Copy] Applied Power Electronics Conference and Exposition, 2004. APEC '04. Nineteenth Annual IEEE, Vol. 1 (2004), pp. 383-391 Vol.1. by J. Xiao, A. Peterchev, J. Zhang, S. Sanders posted to buck converter low-power by summerxia on 2006-09-22 17:28:32 as
	Ultra low power A/D converters using an enhanced differential charge-transfer amplifier [My Copy] Solid-State Circuits Conference, 2000. ESSCIRC '00. Proceedings of the 26th European (2000), pp. 216-219. by W. J. Marble, D. T. Comer posted to adc low-power by summerxia on 2006-09-22 17:26:42 as
	An ultralow-power switched opamp-based 10-B integrated ADC for implantable biomedical applications [My Copy] Circuits and Systems I: Regular Papers, IEEE Transactions on [see also Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on], Vol. 51, No. 1. (2004), pp. 174-177. by G. Bonfini, A. S. Brogna, C. Garbossa, et al.L. Colombini, M. Bacci, S. Chicca, F. Bigongiari, N. C. Guerrini, G. Ferri posted to adc low-power by summerxia on 2006-09-22 17:24:22 as
	Two-phase resonant clocking for ultra-low-power hearing aid applications [My Copy] In DATE '06: Proceedings of the conference on Design, automation and test in Europe (2006), pp. 73-78. by Flavio Carbognani, Felix Buergin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner posted to clocking low-power by summerxia on 2006-09-08 00:26:25 as

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power-estimation	4
sensor	4
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flip	3
flops	3
glitching	3
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tfe08	3
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leakage	1
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narrow	1
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power	1
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pwm	1
ram	1
reconfiguration	1
reference	1
resistive	1
retiming	1
sad-early-termination	1
seeding	1
sensor-network	1
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single-frequency	1
solar-power	1
suitable	1
systolic	1
temperature-compensation	1
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