Tag memoryhierarchy [51 articles] Export

Recent papers classified by the tag memoryhierarchy.

	Memory Systems: Cache, DRAM, Disk [My Copy] (10 September 2007) by Bruce Jacob, Spencer Ng, David Wang posted to teaching memoryhierarchy experimental available_dei by Fantozzi on 2009-07-20 17:23:50 as along with 1 person hubris
	Multi-core Cache Hierarchies (Synthesis Lectures on Computer Architecture) [My Copy] (15 August 2009) by Rajeev Balasubramonian, Norman Jouppi posted to memoryhierarchy multicore tobuy by Fantozzi on 2009-07-20 16:56:58 as
	Cache-Oblivious Computation: Algorithms and Experimental Evaluation [My Copy] Computing: Theory and Applications, 2007. ICCTA '07. International Conference on In Computing: Theory and Applications, 2007. ICCTA '07. International Conference on (2007), pp. 20-26. by V. Ramachandran posted to algorithms experimental graphs memoryhierarchy obliviousness by Fantozzi on 2009-06-02 07:43:47 as
	An experimental comparison of cache-oblivious and cache-conscious programs [My Copy] In SPAA '07: Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures (2007), pp. 93-104. by Kamen Yotov, Tom Roeder, Keshav Pingali, John Gunnels, Fred Gustavson posted to algorithms experimental matrices memoryhierarchy obliviousness by Fantozzi on 2009-06-02 07:36:19 as along with 1 person timos
	Advanced memory optimization techniques for low power embedded processors [My Copy] (08 May 2007) by Manish Verma, Peter Marwedel posted to available_dei embedded lowpower memoryhierarchy owned by Fantozzi on 2009-03-03 10:09:46 as along with 1 person leosteinfeld
	Predicting inter-thread cache contention on a chip multi-processor architecture [My Copy] High-Performance Computer Architecture, 2005. HPCA-11. 11th International Symposium on In High-Performance Computer Architecture, 2005. HPCA-11. 11th International Symposium on (2005), pp. 340-351. by Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihin posted to experimental memoryhierarchy multicore by Fantozzi on 2009-02-24 08:43:07 as
	Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture [My Copy] In PACT '04: Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (2004), pp. 111-122. by Seongbeom Kim, Dhruba Chandra, Yan Solihin posted to experimental memoryhierarchy multicore by Fantozzi on 2009-02-24 08:39:19 as along with 1 person cfallin
	Extending the Hong-Kung model to memory hierarchies [My Copy] Computing and Combinatorics (1995), pp. 270-281. by John E. Savage posted to cdag memoryhierarchy models by Fantozzi on 2009-02-10 10:59:53 as
	Dynamic randomized simulation of hierarchical PRAMs on meshes [My Copy] Parallel Algorithms/Architecture Synthesis, 1995. Proceedings. First Aizu International Symposium on In Parallel Algorithms/Architecture Synthesis, 1995. Proceedings. First Aizu International Symposium on (1995), pp. 257-263. by T. Heywood, C. Leopold posted to memoryhierarchy parallelism pram by Fantozzi on 2009-02-02 10:50:37 as
	A practical hierarchical model of parallel computation I. The model [My Copy] Journal of Parallel and Distributed Computing, Vol. 16, No. 3. (November 1992), pp. 212-232. by T. Heywood posted to memoryhierarchy models parallelism pram by Fantozzi on 2009-02-02 10:43:14 as
	A practical hierarchical model of parallel computation [My Copy] Parallel and Distributed Processing, 1991. Proceedings of the Third IEEE Symposium on In Parallel and Distributed Processing, 1991. Proceedings of the Third IEEE Symposium on (1991), pp. 18-25. by T. Heywood, S. Ranka posted to memoryhierarchy models parallelism pram by Fantozzi on 2009-02-02 10:41:33 as along with 1 person yuri_rwx
	Modeling parallel computers as memory hierarchies [My Copy] Programming Models for Massively Parallel Computers, 1993. Proceedings In Programming Models for Massively Parallel Computers, 1993. Proceedings (1993), pp. 116-123. by B. Alpern, L. Carter, J. Ferrante posted to memoryhierarchy models parallelism by Fantozzi on 2009-02-02 09:54:32 as
	Interconnect design considerations for large NUCA caches [My Copy] In ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture (2007), pp. 369-380. by Naveen Muralimanohar, Rajeev Balasubramonian posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 18:40:25 as along with 1 person mamadoudiao
	Comparing memory systems for chip multiprocessors [My Copy] SIGARCH Comput. Archit. News, Vol. 35, No. 2. (May 2007), pp. 358-368. by Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 18:23:41 as along with 4 people liujacky2001 muli rstata mamadoudiao
	An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors [My Copy] High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on In High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on (2007), pp. 2-12. by H. Dybdahl, P. Stenstrom posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 18:20:13 as along with 3 people mengjuwu walteryhli mamadoudiao
	A novel migration-based NUCA design for chip multiprocessors [My Copy] In SC '08: Proceedings of the 2008 ACM/IEEE conference on Supercomputing (2008), pp. 1-12. by Mahmut Kandemir, Feihui Li, Mary J. Irwin, Seung W. Son posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 18:19:16 as along with 1 person mamadoudiao
	Organizing the Last Line of Defense before Hitting the Memory Wall for CMPs [My Copy] High-Performance Computer Architecture, International Symposium on, Vol. 0 (2004) by Chun Liu, Anand Sivasubramaniam, Mahmut Kandemir posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 18:12:19 as along with 1 person walteryhli
	A NUCA Substrate for Flexible CMP Cache Sharing [My Copy] IEEE Transactions on Parallel and Distributed Systems In Parallel and Distributed Systems, IEEE Transactions on, Vol. 18, No. 8. (2007), pp. 1028-1040. by Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 18:01:40 as along with 1 person c_hughes
	Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors [My Copy] In ISCA '05: Proceedings of the 32nd Annual International Symposium on Computer Architecture, Vol. 33, No. 2. (May 2005), pp. 336-345. by Michael Zhang, Krste Asanovic posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 17:37:27 as along with 3 people and 1 group adamx jcasper hannibal_07 sucs
	Proximity-aware directory-based coherence for multi-core processor architectures [My Copy] In SPAA '07: Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures (2007), pp. 126-134. by Jeffery A. Brown, Rakesh Kumar, Dean Tullsen posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 17:20:51 as
	Scheduling threads for constructive cache sharing on CMPs [My Copy] In SPAA '07: Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures (2007), pp. 105-115. by Shimin Chen, Phillip B. Gibbons, Michael Kozuch, et al.Vasileios Liaskovitis, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Todd C. Mowry, Chris Wilkerson posted to experimental memoryhierarchy multicore parallelism scheduling by Fantozzi on 2009-01-28 17:10:05 as
	Utilizing shared data in chip multiprocessors with the Nahalal architecture [My Copy] In SPAA '08: Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures (2008), pp. 1-10. by Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. Weiser posted to architectures experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 17:03:16 as
	A consistency architecture for hierarchical shared caches [My Copy] In SPAA '08: Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures (2008), pp. 11-22. by Edya L. Mozes, Charles E. Leiserson posted to architectures memoryhierarchy multicore parallelism by Fantozzi on 2009-01-28 16:50:18 as along with 2 people adamx rnaughton
	Performance evaluation of exclusive cache hierarchies [My Copy] Performance Analysis of Systems and Software, 2004 IEEE International Symposium on - ISPASS In Performance Analysis of Systems and Software, 2004 IEEE International Symposium on - ISPASS (2004), pp. 89-96. by Ying Zheng, B. T. Davis, M. Jordan posted to experimental memoryhierarchy by Fantozzi on 2009-01-28 16:39:06 as
	Cooperative cache partitioning for chip multiprocessors [My Copy] In ICS '07: Proceedings of the 21st annual international conference on Supercomputing (2007), pp. 242-252. by Jichuan Chang, Gurindar S. Sohi posted to experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 16:35:00 as
	Cooperative Caching for Chip Multiprocessors [My Copy] Computer Architecture, 2006. ISCA '06. 33rd International Symposium on In Computer Architecture, 2006. ISCA '06. 33rd International Symposium on (2006), pp. 264-276. by Jichuan Chang, G. S. Sohi posted to experimental memoryhierarchy multicore by Fantozzi on 2009-01-28 16:32:00 as along with 2 people adamx walteryhli
	On the limits of cache-oblivious rational permutations [My Copy] Theor. Comput. Sci., Vol. 402, No. 2-3. (2008), pp. 221-233. by Francesco Silvestri posted to algorithms lowerbounds memoryhierarchy obliviousness by Fantozzi on 2009-01-27 17:02:24 as
	On the limits of cache-obliviousness [My Copy] In STOC '03: Proceedings of the thirty-fifth annual ACM symposium on Theory of computing (2003), pp. 307-315. by Gerth S. Brodal, Rolf Fagerberg posted to algorithms lowerbounds memoryhierarchy obliviousness by Fantozzi on 2009-01-19 14:51:02 as
	The cache-oblivious gaussian elimination paradigm: theoretical framework, parallelization and experimental evaluation [My Copy] In SPAA '07: Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures (2007), pp. 71-80. by Rezaul A. Chowdhury, Vijaya Ramachandran posted to algorithms memoryhierarchy obliviousness by Fantozzi on 2009-01-19 14:49:32 as
	Cache-oblivious dynamic programming [My Copy] In SODA '06: Proceedings of the seventeenth annual ACM-SIAM symposium on Discrete algorithm (2006), pp. 591-600. by Rezaul A. Chowdhury, Vijaya Ramachandran posted to algorithms memoryhierarchy obliviousness by Fantozzi on 2009-01-19 14:47:42 as
	Cache oblivious stencil computations [My Copy] In ICS '05: Proceedings of the 19th annual international conference on Supercomputing (2005), pp. 361-366. by Matteo Frigo, Volker Strumpen posted to algorithms memoryhierarchy obliviousness by Fantozzi on 2009-01-19 14:45:00 as
	Cache-oblivious algorithms [My Copy] Foundations of Computer Science, 1999. 40th Annual Symposium on In Foundations of Computer Science, 1999. 40th Annual Symposium on (1999), pp. 285-297. by M. Frigo, C. E. Leiserson, H. Prokop, S. Ramachandran posted to algorithms memoryhierarchy models obliviousness by Fantozzi on 2009-01-19 14:42:53 as
	Competitive analysis of paging [My Copy] Online Algorithms (1998), pp. 52-73. by Sandy Irani posted to memoryhierarchy paging survey by Fantozzi on 2009-01-16 14:46:28 as
	On the Space and Access Complexity of Computation DAGs [My Copy] Graph-Theoretic Concepts in Computer Science (2000), pp. 81-92. by Gianfranco Bilardi, Andrea Pietracaprina, Paolo D'Alberto posted to cdag lowerbounds memoryhierarchy by Fantozzi on 2009-01-14 16:31:21 as
	A Characterization of Temporal Locality and Its Portability across Memory Hierarchies [My Copy] Automata, Languages and Programming (2001), pp. 128-139. by Gianfranco Bilardi, Enoch Peserico posted to lowerbounds memoryhierarchy models scheduling by Fantozzi on 2009-01-14 16:28:43 as
	A model for hierarchical memory [My Copy] In STOC '87: Proceedings of the nineteenth annual ACM symposium on Theory of computing (1987), pp. 305-314. by A. Aggarwal, B. Alpern, A. Chandra, M. Snir posted to lowerbounds memoryhierarchy models by Fantozzi on 2009-01-14 16:22:01 as
	The uniform memory hierarchy model of computation [My Copy] Algorithmica, Vol. 12, No. 2. (1994), pp. 72-109. by B. Alpern, L. Carter, E. Feig, T. Selker posted to memoryhierarchy models parallelism by Fantozzi on 2009-01-14 16:15:45 as
	An Address Dependence Model of Computation for Hierarchical Memories with Pipelined Transfer [My Copy] Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International In Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (2005), pp. 202b-202b. by G. Bilardi, K. Ekanadham, P. Pattnaik posted to algorithms memoryhierarchy models by Fantozzi on 2009-01-07 11:54:24 as
	Models for parallel and hierarchical computation [My Copy] In CF '07: Proceedings of the 4th international conference on Computing frontiers (2007), pp. 95-96. by Gianfranco Bilardi posted to memoryhierarchy models obliviousness parallelism survey by Fantozzi on 2009-01-03 14:05:10 as
	Optimal organizations for pipelined hierarchical memories [My Copy] In SPAA '02: Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures (2002), pp. 109-116. by Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik posted to memoryhierarchy models by Fantozzi on 2009-01-03 14:02:36 as
	Computational power of pipelined memory hierarchies [My Copy] In SPAA '01: Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures (2001), pp. 144-152. by Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik posted to lowerbounds memoryhierarchy models by Fantozzi on 2009-01-03 13:58:22 as
	A unified model for multicore architectures [My Copy] In IFMT '08: Proceedings of the 1st international forum on Next-generation multicore/manycore technologies (2008), pp. 1-12. by John E. Savage, Mohammad Zubair posted to memoryhierarchy models multicore parallelism by Fantozzi on 2009-01-03 13:36:20 as
	Provably good multicore cache performance for divide-and-conquer algorithms [My Copy] In SODA '08: Proceedings of the nineteenth annual ACM-SIAM symposium on Discrete algorithms (2008), pp. 501-510. by Guy E. Blelloch, Rezaul A. Chowdhury, Phillip B. Gibbons, Vijaya Ramachandran, Shimin Chen, Michael Kozuch posted to memoryhierarchy models multicore parallelism by Fantozzi on 2008-12-23 15:24:47 as along with 1 person adamx
	Cache-oblivious streaming B-trees [My Copy] In SPAA '07: Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures (2007), pp. 81-92. by Michael A. Bender, Martin F. Colton, Jeremy T. Fineman, Yonatan R. Fogel, Bradley C. Kuszmaul, Jelani Nelson posted to datastructures memoryhierarchy obliviousness by Fantozzi on 2008-12-17 14:23:13 as
	The cache complexity of multithreaded cache oblivious algorithms [My Copy] In SPAA '06: Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures (2006), pp. 271-280. by Matteo Frigo, Volker Strumpen posted to memoryhierarchy models multicore obliviousness parallelism by Fantozzi on 2008-12-17 11:38:13 as
	Effectively sharing a cache among threads [My Copy] In SPAA '04: Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures (2004), pp. 235-244. by Guy E. Blelloch, Phillip B. Gibbons posted to cdag memoryhierarchy models multicore parallelism by Fantozzi on 2008-12-11 10:58:07 as along with 1 person thepogoman
	Translating submachine locality into locality of reference [My Copy] Journal of Parallel and Distributed Computing, Vol. 66, No. 5. (May 2006), pp. 633-646. by Carlo Fantozzi, Andrea Pietracaprina, Geppino Pucci posted to memoryhierarchy models parallelism by Fantozzi on 2008-12-09 17:36:16 as
	Translating submachine locality into locality of reference [My Copy] Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International In Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International (2004), 34. by Carlo Fantozzi, Andrea Pietracaprina, Geppino Pucci posted to memoryhierarchy models parallelism by Fantozzi on 2008-12-09 17:35:07 as
	Seamless Integration of Parallelism and Memory Hierarchy [My Copy] Automata, Languages and Programming (2002), pp. 785-785. by Carlo Fantozzi, Andrea Pietracaprina, Geppino Pucci posted to memoryhierarchy models parallelism by Fantozzi on 2008-12-09 17:34:32 as
	Fundamental parallel algorithms for private-cache chip multiprocessors [My Copy] In SPAA '08: Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures (2008), pp. 197-206. by Lars Arge, Michael T. Goodrich, Michael Nelson, Nodari Sitchinava posted to algorithms memoryhierarchy multicore parallelism by Fantozzi on 2008-12-09 17:33:31 as

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parallelism	17
obliviousness	12
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architectures	10
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available_dei	2
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