Tag vliw [21 articles] Export

Recent papers classified by the tag vliw.

	Effective compiler support for predicated execution using the hyperblock [My Copy] In MICRO 25: Proceedings of the 25th annual international symposium on Microarchitecture (1992), pp. 45-54. by Scott A. Mahlke, David C. Lin, William Y. Chen, Richard E. Hank, Roger A. Bringmann posted to scheduling vliw by NickGasson on 2009-06-22 14:01:26 as along with 1 person visit0r
	The superblock: an effective technique for VLIW and superscalar compilation [My Copy] J. Supercomput., Vol. 7, No. 1-2. (1993), pp. 229-248. by Wen-Mei W. Hwu, Scott A. Mahlke, William Y. Chen, et al.Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, Daniel M. Lavery posted to scheduling vliw by NickGasson on 2009-06-22 13:45:33 as along with 2 people kvm visit0r
	Embedded Computing : A VLIW Approach to Architecture, Compilers and Tools [My Copy] (17 December 2004) by Joseph A. Fisher, Paolo Faraboschi, Cliff Young posted to comp-arch compilers scheduling vliw by NickGasson on 2009-06-19 17:13:08 as along with 2 people and 1 group jolilius qiongc TUCS-ES_Lab
	Instruction-Level Parallelism for Reconfigurable Computing [My Copy] Field-Programmable Logic and Applications From FPGAs to Computing Paradigm In Field-Programmable Logic and Applications From FPGAs to Computing Paradigm (1998), 248. by T. J. Callahan, J. Wawrzynek posted to hw-compilation scheduling vliw by NickGasson on 2009-04-20 20:33:36 as
	Trace Scheduling: A Technique for Global Microcode Compaction [My Copy] Computers, IEEE Transactions on In Computers, IEEE Transactions on, Vol. C-30, No. 7. (1981), pp. 478-490. by J. A. Fisher posted to comp-arch scheduling vliw by NickGasson on 2009-04-02 21:01:10 as
	Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems [My Copy] ACM Trans. Archit. Code Optim., Vol. 5, No. 2. (2008), pp. 1-33. by Vincenzo Catania, Maurizio Palesi, Davide Patti posted to design-space-exploration embedded-systems vliw by visit0r on 2008-08-29 14:05:23 as along with 1 person perttikellomaki
	BWM: a Concrete Machine for Graph Reduction [My Copy] In Functional Programming, Glasgow 1991: Proceedings of the 1991 Workshop, Portree, UK (1992), pp. 36-50. by L. Augustsson edited by R. Heldal, C. K. Holst, P. L. Wadler posted to architecture functional-programming lambda-machine lazy-language vliw by pedagand on 2008-05-14 19:17:31 as
	Code generation schema for modulo scheduled loops [My Copy] SIGMICRO Newsl., Vol. 23, No. 1-2. (1992), pp. 158-169. by Ramakrishna B. Rau, Michael S. Schlansker, P. P. Tirumalai posted to architecture ia-64 modulo-scheduling vliw by pedagand on 2008-04-15 20:09:10 as
	Inter-cluster communication in VLIW architectures [My Copy] ACM Trans. Archit. Code Optim., Vol. 4, No. 2. (June 2007) by A. S. Terechko, H. Corporaal posted to clustering power scheduling vliw by perttikellomaki on 2007-12-18 12:48:32 as
	The latest word in digital and media processing [My Copy] Signal Processing Magazine, IEEE In Signal Processing Magazine, IEEE, Vol. 15, No. 2. (1998), pp. 59-85. by P. Faraboschi, G. Desoli, J. A. Fisher posted to dsp vliw by visit0r on 2007-12-03 16:33:24 as
	The multiflow trace scheduling compiler [My Copy] J. Supercomput., Vol. 7, No. 1-2. (1993), pp. 51-142. by Geoffrey P. Lowney, Stefan M. Freudenberger, Thomas J. Karzes, et al.W. D. Lichtenstein, Robert P. Nix, John S. O'Donnell, John Ruttenberg posted to trace-scheduling vliw by visit0r on 2007-12-03 15:49:14 as along with 2 people and 1 group guillonc thens CompsSTMicro
	Very Long Instruction Word architectures and the ELI-512 [My Copy] In ISCA '83: Proceedings of the 10th annual international symposium on Computer architecture (1983), pp. 140-150. by Joseph A. Fisher posted to trace-scheduling vliw by visit0r on 2007-12-03 15:37:45 as
	Parallel processing: a smart compiler and a dumb machine [My Copy] In SIGPLAN '84: Proceedings of the 1984 SIGPLAN symposium on Compiler construction, Vol. 19, No. 6. (June 1984), pp. 37-47. by Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, Alexandru Nicolau posted to ilp vliw by visit0r on 2007-12-03 15:11:26 as along with 1 person jespera
	A Trimaran based framework for exploring the design space of VLIW ASIPs with coarse grain functional units [My Copy] In ISSS '02: Proceedings of the 15th international symposium on System Synthesis (2002), pp. 2-7. by Bhuvan Middha, Anup Gangwar, Anshul Kumar, M. Balakrishnan, Paolo Ienne posted to asip coarse-grain-operations design-space-exploration sfu vliw by visit0r on 2007-12-02 19:40:02 as along with 1 person chiu
	Heterogeneous Clustered VLIW Microarchitectures [My Copy] In CGO '07: Proceedings of the International Symposium on Code Generation and Optimization (2007), pp. 354-366. by Alex Aleta, Josep M. Codina, Antonio Gonzalez, David Kaeli posted to architecture hetereogeneous vliw by mwmarkland on 2007-11-12 18:51:23 as
	A VLIW architecture for a trace scheduling compiler [My Copy] SIGOPS Oper. Syst. Rev., Vol. 21, No. 4. (October 1987), pp. 180-192. by Robert P. Colwell, Robert P. Nix, John J. O'Donnell, David B. Papworth, Paul K. Rodman posted to e0243 vliw by thens on 2005-10-08 10:34:30 as
	Stage scheduling: a technique to reduce the register requirements of a modulo schedule [My Copy] In MICRO 28: Proceedings of the 28th annual international symposium on Microarchitecture (1995), pp. 338-349. by Alexandre E. Eichenberger, Edward S. Davidson posted to compiler moduloscheduling vliw by kvm on 2005-09-20 14:56:42 as
	Swing Modulo Scheduling: A Lifetime-Sensitive Approach [My Copy] In PACT '96: Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques (1996) by Josep Llosa posted to compiler moduloscheduling vliw by kvm on 2005-09-20 14:56:02 as
	Synthesis of application specific instructions for embedded DSP software [My Copy] In ICCAD '98: Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design (1998), pp. 665-671. by Hoon Choi, Seung H. Hwang, Chong-Min Kyung, In-Cheol Park posted to synthesis vliw by kvm on 2005-09-20 14:53:38 as
	The Multicluster Architecture: Reducing Cycle Time Through Partitioning [My Copy] In International Symposium on Microarchitecture (1997), pp. 149-159. by Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic posted to clustering computer-architecture vliw by kvm on 2005-09-17 20:37:20 as
	The Multiflow Trace Scheduling Compiler [My Copy] The Journal of Supercomputing, Vol. 7, No. 1-2. (1993), pp. 51-142. by Geoffrey P. Lowney, Stefan M. Freudenberger, Thomas J. Karzes, et al.W. D. Lichtenstein, Robert P. Nix, John S. O'Donnell, John C. Ruttenberg posted to compiler vliw by kvm on 2005-09-17 20:36:48 as along with 2 people damaru ronnix

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scheduling	6
compiler	4
design-space-exploration	4
trace-scheduling	4
architecture	3
clustering	3
asip	2
coarse-grain-operations	2
comp-arch	2
dsp	2
e0243	2
embedded-systems	2
ilp	2
moduloscheduling	2
power	2
sfu	2
compiler_optimization	1
compilers	1
computer-architecture	1
functional-programming	1
hetereogeneous	1
hw-compilation	1
ia-64	1
instruction-scheduling	1
lambda-machine	1
lazy-language	1
loop	1
modulo-scheduling	1
synthesis	1

Tag vliw [21 articles] Export

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