Tag xilinx [25 articles] Export

Recent papers classified by the tag xilinx.

	Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing [My Copy] Field-Programmable Custom Computing Machines, 2007. FCCM 2007. 15th Annual IEEE Symposium on In Field-Programmable Custom Computing Machines, 2007. FCCM 2007. 15th Annual IEEE Symposium on (2007), pp. 127-140. by Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka posted to cluster fccm fccm2007 fpga new-system peta-scale xilinx by reactgary on 2007-10-11 15:56:43 as
	Configurable Transactional Memory [My Copy] Field-Programmable Custom Computing Machines, 2007. FCCM 2007. 15th Annual IEEE Symposium on In Field-Programmable Custom Computing Machines, 2007. FCCM 2007. 15th Annual IEEE Symposium on (2007), pp. 65-72. by Chirstoforos Kachris, Chidamber Kulkarni posted to fccm fccm2007 fpga transactional-memory xilinx by reactgary on 2007-10-11 13:36:34 as along with 1 person gareis
	Secure Remote Control And Configuration Of The Fpx Platform In Gigabit Ethernet Environment [My Copy] by Haoyu Song posted to environment ethernet how in stablish to xilinx by ani_rudh26 on 2007-05-31 10:03:22 as
	Power-aware Technology Mapping for LUT-based FPGAs [My Copy] Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on In Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology (2002), pp. 211-218. by J. H. Anderson, F. N. Najm posted to activity algorithms for_thesis fpl_paper fpt_paper logic_synthesis lut power power_estimation probability technology_mapping xilinx by nathalie on 2006-09-01 06:55:25 as along with 1 person ceegrs2
	Dynamic Voltage Scaling for Commercial FPGAs [My Copy] Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology (2005), pp. 173-180. by C. T. Chow, L. S. M. Tsui, P. H. W. Leong, W. Luk, S. J. E. Wilton posted to altera architecture for_thesis fpga fpl_paper fpt_paper power power_estimation vlsi xilinx by nathalie on 2006-09-01 06:46:27 as along with 2 people reactgary ceegrs2
	Measuring the Gap Between FPGAs and ASICs [My Copy] In FPGA'06: Proceedings of the Internation Symposium on Field Programmable Gate Arrays (2006), pp. 21-30. by Ian Kuon, Jonathan Rose posted to altera area asic benchmarks for_thesis fpga leakage performance power xilinx by nathalie on 2006-09-01 05:24:19 as along with 4 people ericschung hannibal_08 ceegrs2 JonsonXP
	A 90nm Low-power FPGA for Battery-powered Applications [My Copy] In FPGA'06: Proceedings of the internation symposium on Field programmable gate arrays (2006), pp. 3-11. by Tim Tuan, Sean Kao, Arif Rahman, Satyaki Das, Steve Trimberger posted to architecture for_thesis fpga leakage power xilinx by nathalie on 2006-09-01 05:17:34 as along with 1 person ceegrs2
	Active Leakage Power Optimization for FPGAs [My Copy] IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 25, No. 3. (2006), pp. 423-437. by J. H. Anderson, F. N. Najm posted to algorithms for_thesis fpga leakage lut power xilinx by nathalie on 2006-09-01 02:18:26 as along with 1 person ceegrs2
	The Design of a Low Energy FPGA [My Copy] Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on In Proceedings. 1999 International Symposium on Low Power Electronics and Design (1999), pp. 188-193. by V. George, Hui Zhang, J. Rabaey posted to architecture for_thesis fpga interconnect lut power power_estimation power_measurement routing xilinx by nathalie on 2006-09-01 01:45:28 as
	Power Estimation Techniques for FPGAs [My Copy] IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, No. 10. (2004), pp. 1015-1027. by J. H. Anderson, F. N. Najm posted to activity for_thesis fpga interconnect power power_estimation vlsi xilinx by nathalie on 2006-09-01 01:12:59 as along with 1 person ceegrs2
	Directional and single-driver wires in FPGA interconnect [My Copy] Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on (2004), pp. 41-48. by G. Lemieux, E. Lee, M. Tom, A. Yu posted to altera architecture for_thesis fpga interconnect routing xilinx by nathalie on 2006-08-28 04:10:16 as
	On two-step routing for FPGAS [My Copy] In ISPD '97: Proceedings of the 1997 international symposium on Physical design (1997), pp. 60-66. by Guy G. F. Lemieux, Stephen D. Brown, Daniel Vranesic posted to architecture for_thesis interconnect routing xilinx by nathalie on 2006-08-11 06:12:00 as
	FPGA Implementation of Carrier Synchronization for QAM Receivers [My Copy] J. VLSI Signal Process. Syst., Vol. 36, No. 1. (January 2004), pp. 57-71. by Chris Dick, Fred Harris, Michael Rice posted to fpga hardware qam sdr synchronization wireless xilinx by dk1357 on 2006-05-08 18:02:19 as along with 1 person douggeiger
	Overview of the FREEDOM compiler for mapping DSP software to FPGAs [My Copy] Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on (2004), pp. 37-46. by D. Zaretsky, M. Mittal, Xiaoyong Tang, P. Banerjee posted to arithmetic dsp for_thesis fpga fpl_paper printed xilinx by nathalie on 2006-02-10 19:29:03 as
	A reconfigurable multiplier array for video image processing tasks, suitable for embedding in an FPGA structure [My Copy] FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on (1998), pp. 226-234. by S. D. Haynes, P. Y. K. Cheung posted to altera architecture arithmetic embedded for_thesis fpga fpl_paper image_processing multiplier printed xilinx by nathalie on 2006-01-10 23:48:14 as
	Flexible reconfigurable multiplier blocks suitable for enhancing the architecture of FPGAs [My Copy] Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999 (1999), pp. 191-194. by S. D. Haynes, A. B. Ferrari, P. Y. K. Cheung posted to altera architecture arithmetic for_thesis fpga fpl_paper multiplier printed xilinx by nathalie on 2005-06-22 06:32:37 as
	A flexible multiplication unit for an FPGA logic block [My Copy] Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, Vol. 4 (2001), pp. 546-549 vol. 4. by K. Rajagopalan, P. Sutton posted to arithmetic fpga multiplier xilinx by nathalie on 2005-06-22 06:18:49 as
	A Library of Parameterized Floating-Point Modules and Their Use [My Copy] 12th International Conference on Field-Programmable Logic and Applications 2002 In FPL '02: Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications (2002), pp. 657-666. by Pavle Belanovic, Miriam Leeser posted to arithmetic floating_point fpga parametrized xilinx by nathalie on 2005-06-17 23:20:59 as
	Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs [My Copy] In FCCM '03: Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (2003) by Xiaojun Wang, Brent E. Nelson posted to arithmetic division floating_point fpga xilinx by nathalie on 2005-06-17 19:22:27 as
	Closing the Gap: CPU and FPGA Trends in Sustainable Floating-Point BLAS Performance [My Copy] In FCCM '04: Proceedings of the Field-Programmable Custom Computing Machines, 12th Annual IEEE Symposium on (FCCM'04) (2004), pp. 219-228. by Keith D. Underwood, K. Scott Hemmert posted to arithmetic floating_point fpga matrix printed xilinx by nathalie on 2005-06-16 23:47:04 as
	An Arithmetic Library and Its Application to the N-body Problem [My Copy] In FCCM '04: Proceedings of the Field-Programmable Custom Computing Machines, 12th Annual IEEE Symposium on (FCCM'04) (2004), pp. 68-78. by K. H. Tsoi, C. H. Ho, H. C. Yeung, P. H. W. Leong posted to adder arithmetic fpga multiplier xilinx by nathalie on 2005-06-15 21:58:17 as
	A fast-multiplier generator for FPGAs [My Copy] VLSI Design, 1995., Proceedings of the 8th International Conference on (1995), pp. 53-56. by S. Kumar, K. Forward, M. Palaniswami posted to arithmetic fpga multiplier xilinx by nathalie on 2005-06-15 08:25:07 as
	FPGA adders: performance evaluation and optimal design [My Copy] Design & Test of Computers, IEEE, Vol. 15, No. 1. (1998), pp. 24-29. by Shanzhen Xing, W. Yu posted to adder arithmetic fpga xilinx by nathalie on 2005-05-18 21:58:54 as
	Dynamic power consumption in Virtex&\#8482;-II FPGA family [My Copy] In FPGA '02: Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays (2002), pp. 157-164. by Li Shang, Alireza S. Kaviani, Kusuma Bathala posted to for_thesis fpga fpl_paper power power_estimation power_measurement printed xilinx by nathalie on 2005-05-13 00:09:54 as along with 2 people NickGasson ceegrs2
	Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations [My Copy] Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings. 16th Symposium on (2003), pp. 283-288. by J. Becker, M. Huebner, M. Ullmann posted to fpga power power_estimation power_measurement printed xilinx by nathalie on 2005-05-09 19:14:02 as

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fpga	22
for_thesis	13
arithmetic	10
power	9
architecture	7
fpl_paper	6
power_estimation	6
printed	6
altera	5
multiplier	5
interconnect	4
floating_point	3
leakage	3
lut	3
power_measurement	3
routing	3
activity	2
adder	2
algorithms	2
fccm	2
fccm2007	2
fpt_paper	2
vlsi	2
area	1
asic	1
benchmarks	1
cluster	1
division	1
dsp	1
embedded	1
environment	1
ethernet	1
hardware	1
how	1
image_processing	1
in	1
logic_synthesis	1
matrix	1
new-system	1
parametrized	1
performance	1
peta-scale	1
probability	1
qam	1
sdr	1
stablish	1
synchronization	1
technology_mapping	1
to	1
transactional-memory	1
wireless	1

Tag xilinx [25 articles] Export

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