Trent's library 43 articles Export

	An efficient approach for system-level timing simulation of compiler-optimized embedded software [My Copy] In DAC '09: Proceedings of the 46th Annual Design Automation Conference (2009), pp. 220-225. by Zhonglei Wang, Andreas Herkersdorf posted to timing_simulation sw_timing accuracy by Trent on 2009-11-24 02:29:22 as along with 1 person miniegg
	Microarchitectural exploration with Liberty [My Copy] Microarchitecture, 2002. (MICRO-35). Proceedings. 35th Annual IEEE/ACM International Symposium on In Microarchitecture, 2002. (MICRO-35). Proceedings. 35th Annual IEEE/ACM International Symposium on (06 February 2003), pp. 271-282. by M. Vachharajani, N. Vachharajani, D. A. Penry, J. A. Blome, D. I. August posted to processor micro cycle_acurate by Trent on 2009-11-14 06:13:25 as along with 1 person hannibal_07
	LISA---machine description language for cycle-accurate models of programmable DSP architectures [My Copy] In DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference (1999), pp. 933-938. by Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr posted to pipelined_processors cycle_acurate by Trent on 2009-10-17 10:41:17 as along with 1 person visit0r
	Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation [My Copy] In ICCAD '03: Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design (2003), 138. by In C. Park, Sehyeon Kang, Yongseok Yi posted to pipelined_processors cycle_acurate by Trent on 2009-10-17 10:40:38 as
	A compilation-based software estimation scheme for hardware/software co-simulation [My Copy] In CODES '99: Proceedings of the seventh international workshop on Hardware/software codesign (1999), pp. 85-89. by Marcello Lajolo, Mihai Lazarescu, Alberto S. Vincentelli posted to co_simulation by Trent on 2009-10-17 10:37:00 as along with 1 person and 1 group jolilius TUCS-ES_Lab
	A framework for fast hardware-software co-simulation [My Copy] Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings (07 August 2002), pp. 760-764. by A. Hoffmann, T. Kogel, H. Meyr posted to co_simulation by Trent on 2009-10-07 20:50:22 as
	Integration of Instruction Set Simulators into SystemC High Level Models [My Copy] Digital Systems Design, Euromicro Symposium on, Vol. 0 (2002), 126. by Ilia Oussorov, Wolfgang Raab, Ulrich Hachmann, Alex Kravtsov posted to co_simulation by Trent on 2009-10-07 20:49:37 as
	Incas: a cycle accurate model of UltraSPARC [My Copy] Computer Design, International Conference on, Vol. 0 (1995), 130. by G. Maturana, J. L. Ball, J. Gee, A. Iyer, J. M. O'Connor posted to cycle_acurate co_simulation by Trent on 2009-10-07 20:47:40 as
	Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification [My Copy] Design Automation Conference, Vol. 0 (1999), pp. 964-969. by Lisa Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schl?ger, Bassam Tabbara, Vojin Zivojnovic posted to cycle_acurate co_simulation by Trent on 2009-10-07 20:46:25 as
	Debugging HW/SW Interface for MPSoC: Video Encoder System Design Case Study [My Copy] Design Automation Conference, Vol. 0 (2004), pp. 908-913. by Mohamed W. Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed A. Jerraya posted to debug codesign co_simulation by Trent on 2009-09-24 15:58:59 as
	High-performance timing simulation of embedded software [My Copy] In DAC '08: Proceedings of the 45th annual Design Automation Conference (2008), pp. 290-295. by Jürgen Schnerr, Oliver Bringmann, Alexander Viehl, Wolfgang Rosenstiel posted to sw_timing accuracy by Trent on 2009-09-23 09:35:17 as along with 2 people Joshd kknthu
	Architecture Decisions: Demystifying Architecture [My Copy] Software, IEEE, Vol. 22, No. 2. (2005), pp. 19-27. by J. Tyree, A. Akerman posted to architecture_decisions by Trent on 2009-09-23 09:34:14 as along with 13 people and 2 groups mattbiehl limingzhu MRRHead lfk asilva leonardo larix eelke aku8000 hastudillo germoglio buchgeher marcia esenicta Software-Architecture
	A universal technique for fast and flexible instruction-set architecture simulation [My Copy] Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on In Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 23, No. 12. (2004), pp. 1625-1639. by G. Braun, A. Nohl, A. Hoffmann, O. Schliebusch, R. Leupers, H. Meyr posted to simulators simulation_techniques instruction_set_architecture by Trent on 2009-09-23 09:33:28 as along with 1 person chengyangfu
	Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer [My Copy] In DATE '03: Proceedings of the conference on Design, Automation and Test in Europe (2003) by Sungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed A. Jerraya posted to no-tag by Trent on 2009-09-21 10:16:50 as
	Cycle-approximate retargetable performance estimation at the transaction level [My Copy] In DATE '08: Proceedings of the conference on Design, automation and test in Europe (2008), pp. 3-8. by Yonghyun Hwang, Samar Abdi, Daniel Gajski posted to transaction_level accuracy by Trent on 2009-09-21 10:16:19 as along with 3 people cometyang bigegggary kknthu
	Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC [My Copy] In DATE '04: Proceedings of the conference on Design, automation and test in Europe (2004) by Franco Fummi, Stefano Martini, Giovanni Perbellini, Massimo Poncino posted to hwsw_cosimulation by Trent on 2009-09-21 10:15:23 as
	Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation [My Copy] In DATE '05: Proceedings of the conference on Design, Automation and Test in Europe (2005), pp. 786-791. by Mehrdad Reshadi, Nikil Dutt posted to cycle_acurate by Trent on 2009-09-21 10:11:29 as along with 1 person Joshd
	Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration [My Copy] In ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference (2005), pp. 969-972. by Aimen Bouchhima, Iuliana Bacivarov, Wassim Youssef, Marius Bonaciu, Ahmed A. Jerraya posted to hwsw_cosimulation by Trent on 2009-09-21 10:10:40 as along with 1 person miniegg
	Cycle-approximate Retargetable Performance Estimation at the Transaction Level [My Copy] Design, Automation and Test in Europe, 2008. DATE '08 In Design, Automation and Test in Europe, 2008. DATE '08 (2008), pp. 3-8. by Yonghyun Hwang, S. Abdi, D. Gajski posted to transaction_level sw_timing accuracy by Trent on 2009-09-21 10:05:59 as along with 1 person chengyangfu
	Compiled HW/SW co-simulation [My Copy] Design Automation Conference Proceedings 1996, 33rd In Design Automation Conference Proceedings 1996, 33rd (06 August 2002), pp. 690-695. by V. Zivojnovic, H. Meyr posted to co_simulation by Trent on 2009-09-18 08:53:53 as along with 1 person chengyangfu
	Hardware/software cosimulation from interface perspective [My Copy] Computers and Digital Techniques, IEE Proceedings - In Computers and Digital Techniques, IEE Proceedings -, Vol. 152, No. 3. (25 July 2005), pp. 369-379. by S. Yoo, A. A. Jerraya posted to co_simulation by Trent on 2009-09-18 08:53:18 as along with 1 person and 1 group drizztxd System Level Modeling and Simulation Working Group
	System level power-performance trade-offs in embedded systems using voltage and frequency scaling of off-chip buses and memory [My Copy] In ISSS '02: Proceedings of the 15th international symposium on System Synthesis (2002), pp. 225-230. by Kiran Puttaswamy, Kyu W. Choi, Jun C. Park, Vincent J. Mooney, Abhijit Chatterjee, Peeter Ellervee posted to memory bus by Trent on 2009-08-25 10:08:33 as
	Fast and Accurate Cosimulation of MPSoC Using Trace-Driven Virtual Synchronization [My Copy] Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on In Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 26, No. 12. (2007), pp. 2186-2200. by Youngmin Yi, Dohyung Kim, Soonhoi Ha posted to trace_driven virtual_sync by Trent on 2009-08-08 04:22:40 as
	Trace-driven HW/SW cosimulation using virtual synchronization technique [My Copy] In DAC '05: Proceedings of the 42nd annual Design Automation Conference (2005), pp. 345-348. by Dohyung Kim, Youngmin Yi, Soonhoi Ha posted to trace_driven by Trent on 2009-08-08 04:20:04 as along with 1 person kknthu
	The accuracy of trace-driven simulations of multiprocessors [My Copy] SIGMETRICS Perform. Eval. Rev., Vol. 21, No. 1. (1993), pp. 146-157. by Stephen R. Goldschmidt, John L. Hennessy posted to accuracy trace_driven by Trent on 2009-08-08 04:17:08 as along with 1 person keene
	CATS: cycle accurate transaction-driven simulation with multiple processor simulators [My Copy] In DATE '07: Proceedings of the conference on Design, automation and test in Europe (2007), pp. 749-754. by Dohyung Kim, Soonhoi Ha, Rajesh Gupta posted to cycle_acurate tlm by Trent on 2009-08-08 03:58:42 as
	Fast and accurate performance simulation of embedded software for MPSoC [My Copy] In ASP-DAC '09: Proceedings of the 2009 Conference on Asia and South Pacific Design Automation (2009), pp. 552-557. by Eric Cheung, Harry Hsieh, Felice Balarin posted to sw_timing tlm by Trent on 2009-05-26 09:03:41 as
	High-performance timing simulation of embedded software [My Copy] Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE In Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE (2008), pp. 290-295. by J. Schnerr, O. Bringmann, A. Viehl, W. Rosenstiel posted to sw_timing tlm by Trent on 2009-05-26 09:02:43 as along with 1 person chengyangfu
	Cycle accurate binary translation for simulation acceleration in rapid prototyping of SoCs [My Copy] Design, Automation and Test in Europe, 2005. Proceedings In Design, Automation and Test in Europe, 2005. Proceedings (2005), pp. 792-797 Vol. 2. by J. Schnerr, O. Bringmann, W. Rosenstiel posted to sw_timing tlm by Trent on 2009-05-26 08:56:58 as along with 1 person chengyangfu
	Functional verification of sicortex multiprocessor: system-on-a-chip [My Copy] In DAC '07: Proceedings of the 44th annual conference on Design automation (2007), pp. 906-909. by Oleg Petlin, Wilson Snyder posted to systemc tlmverification by Trent on 2009-04-30 14:01:28 as
	SystemCoDesigner---an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications [My Copy] ACM Trans. Des. Autom. Electron. Syst., Vol. 14, No. 1. (2009), pp. 1-23. by Joachim Keinert, Martin Streub&uhorbar;hr, Thomas Schlichter, et al.Joachim Falk, Jens Gladigau, Christian Haubelt, J&uhorbar;rgen Teich, Michael Meredith posted to codesign by Trent on 2009-04-16 03:18:56 as along with 1 person cometyang
	Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures [My Copy] Design, Automation and Test in Europe Conference and Exhibition, Vol. 1 (2004), 10390. by Vijay D?silva, S. Ramesh, Arcot Sowmya posted to amba concurrency fsm by Trent on 2009-04-09 07:01:27 as
	Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model [My Copy] In ASP-DAC '09: Proceedings of the 2009 Conference on Asia and South Pacific Design Automation (2009), pp. 558-563. by Chen K. Lo, Ren S. Tsay posted to protocol systemc tlm by Trent on 2009-03-29 07:22:21 as
	Functional verification methodology based on formal interface specification and transactor generation [My Copy] In DATE '06: Proceedings of the conference on Design, automation and test in Europe (2006), pp. 1013-1018. by Felice Balarin, Roberto Passerone posted to tlm transactor by Trent on 2009-03-29 07:19:01 as
	Retargetable generation of TLM bus interfaces for MP-SoC platforms [My Copy] Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on In Hardware/Software Codesign and System Synthesis, 2005. CODES+ISSS '05. Third IEEE/ACM/IFIP International Conference on (2005), pp. 249-254. by H. Meyr, R. Leupers, A. Nohl, et al.G. Ascheid, T. Kogel, T. Michiels, A. Wieferink posted to no-tag by Trent on 2009-03-27 09:08:03 as along with 1 person molimomo
	Formal performance evaluation of AMBA-based system-on-chip designs [My Copy] In EMSOFT '06: Proceedings of the 6th ACM \& IEEE International conference on Embedded software (2006), pp. 311-320. by Gabor Madl, Sudeep Pasricha, Luis, Nikil Dutt, Qiang Zhu posted to amba by Trent on 2009-03-27 07:19:08 as along with 1 person mrsmond
	STATEMATE: A Working Environment for the Development of Complex Reactive Systems [My Copy] IEEE Transactions on Software Engineering, Vol. 16, No. 4. (1990), pp. 403-414. by D. Harel, H. Lachover, A. Naamad, et al.A. Pnueli, M. Politi, R. Sherman, A. Shtull Trauring, M. Trakhtenbrot posted to concurrency fsm by Trent on 2009-03-27 03:19:19 as along with 2 people ingo leonardo
	A Classification and Comparison Framework for Software Architecture Description Languages [My Copy] IEEE Trans. Softw. Eng. In Software Engineering, IEEE Transactions on, Vol. 26, No. 1. (January 2000), pp. 70-93. by Nenad Medvidovic, Richard N. Taylor posted to adl by Trent on 2009-03-27 03:18:30 as along with 10 people and 1 group tproenca argo DavidChemouil marcinzalewski ingstrup lfk leonardo marcia janschaefer buchgeher TU-KL-SoftwareTechnologyGroup
	A new optimized implementation of the SystemC engine using acyclic scheduling [My Copy] Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings In Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings, Vol. 1 (2004), pp. 552-557 Vol.1. by D. G. Perez, G. Mouchard, O. Temam posted to scheduling systemc by Trent on 2009-03-21 10:12:16 as
	Automatic Synthesis of Interface Circuits from Simplified IP Interface Protocols [My Copy] Advances in Computer Systems Architecture (2006), pp. 581-587. by Changryul Yun, Younghwan Bae, Hanjin Cho, Kyoungson Jhang posted to hwhw_interface protocol by Trent on 2009-03-19 04:08:57 as
	What is in a step: On the semantics of statecharts [My Copy] Lecture Notes in Computer Science : Theoretical Aspects of Computer Software (1991), pp. 244-264. by A. Pnueli, M. Shalev posted to fsm by Trent on 2009-03-19 03:41:32 as along with 1 person leonardo
	Verifying external interrupts of embedded microprocessor in SoC with on-chip bus [My Copy] Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on In Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on (2008), pp. 372-377. by Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang posted to no-tag by Trent on 2009-03-18 14:15:25 as
	Static analysis and automatic code synthesis of flexible FSM model [My Copy] In ASP-DAC '05: Proceedings of the 2005 conference on Asia South Pacific design automation (2005), pp. 161-165. by Dohyung Kim, Soonhoi Ha posted to concurrency fsm by Trent on 2009-03-17 07:54:23 as along with 1 person drizztxd

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co_simulation	8
cycle_acurate	7
sw_timing	6
tlm	6
accuracy	5
fsm	4
trace_driven	3
concurrency	3
systemc	3
protocol	2
hwsw_cosimulation	2
pipelined_processors	2
transaction_level	2
amba	2
codesign	2
hwhw_interface	1
simulators	1
timing_simulation	1
architecture_decisions	1
virtual_sync	1
debug	1
scheduling	1
bus	1
adl	1
simulation_techniques	1
instruction_set_architecture	1
tlmverification	1
micro	1
transactor	1
processor	1
memory	1

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