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In FPGAs, Oxford Workshop on Field Programmable Logic and Applications (1991), pp. 271-283 Key: citeulike:1273429
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We describe a compiler which maps programs expressed in a subset of occam into netlist descriptions of parallel hardware. Using Field-Programmable Gate Arrays to implement such netlists, problem-specific hardware can be generated entirely by a software process. Inner loops of time-consuming programs can be implemented as hardware and the less intensively-used parts of the program can be mapped into machine code by a conventional compiler. Software investment is protected since the same program...
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