Design of a clustered multiprocessor for real-time natural language understanding Export

@proceedings{c_demara_moldovan_ipps91, abstract = {The authors have designed a parallel architecture called the semantic network array processor (SNAP) for natural language understanding (NLU) and other artificial intelligence applications. It is capable of executing large marker-passing programs and generating results in real-time. The design features 32 processing clusters with four to five functionally dedicated digital signal processors in each cluster. Processors within clusters share a marker-processing memory while communication between clusters is implemented by a buffered message-passing scheme. Throughout the machine, overlapping groups of multiport memories provide a direct yet visible interconnection network. The result is a low cost, flexible, and observable parallel processor capable of performing NLU operations within subsecond response time}, author = {Demara, R. and Moldovan, D.}, citeulike-article-id = {87083}, citeulike-linkout-0 = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=153791}, journal = {Parallel Processing Symposium, 1991. Proceedings., Fifth International}, keywords = {demara}, pages = {270--277}, posted-at = {2005-02-03 17:42:46}, priority = {2}, title = {Design of a clustered multiprocessor for real-time natural language understanding}, url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=153791}, year = {1991} }

TY - CONF ID - c_demara_moldovan_ipps91 L3 - citeulike-article-id:87083 N2 - The authors have designed a parallel architecture called the semantic network array processor (SNAP) for natural language understanding (NLU) and other artificial intelligence applications. It is capable of executing large marker-passing programs and generating results in real-time. The design features 32 processing clusters with four to five functionally dedicated digital signal processors in each cluster. Processors within clusters share a marker-processing memory while communication between clusters is implemented by a buffered message-passing scheme. Throughout the machine, overlapping groups of multiport memories provide a direct yet visible interconnection network. The result is a low cost, flexible, and observable parallel processor capable of performing NLU operations within subsecond response time JF - Parallel Processing Symposium, 1991. Proceedings., Fifth International EP - 277 TI - Design of a clustered multiprocessor for real-time natural language understanding SP - 270 KW - demara AU - Demara, R AU - Moldovan, D PY - 1991/// UR - http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=153791 ER -