Implementation of OFDM modem for the physical layer of IEEE 802.11a standard based on Xilinx Virtex-II FPGA Export

@proceedings{citeulike:3396291, abstract = {A prototype design, which is based on the orthogonal frequency division multiplexing (OFDM) technique, is presented for the physical layer of the IEEE 802.11a standard. Implementation aspects of an OFDM modem on a Xilinx field programmable gate array (FPGA) are addressed. The system includes synchronization circuitry used for packet detection and time synchronization. The demonstrated design flow shows an approach to implementing and prototyping the architecture of a real-time base-band OFDM modem. This design is efficiently synthesized on a 0.15 \μm/0.12 \μm CMOS 8-layer metal process Virtex-II FPGA. The resulting hardware implementation is analyzed and simulated for a system clock speed of 72 MHz to verify adequate performance.}, author = {Manavi, F. and Shayan, Y. R.}, booktitle = {Vehicular Technology Conference, 2004. VTC 2004-Spring. 2004 IEEE 59th}, citeulike-article-id = {3396291}, citeulike-linkout-0 = {http://dx.doi.org/10.1109/VETECS.2004.1390560}, citeulike-linkout-1 = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1390560}, doi = {10.1109/VETECS.2004.1390560}, journal = {Vehicular Technology Conference, 2004. VTC 2004-Spring. 2004 IEEE 59th}, keywords = {80211, fpga, modem, ofdm, physical, receiver, wifi}, pages = {1768--1772 Vol.3}, posted-at = {2008-10-11 12:25:29}, priority = {2}, title = {Implementation of OFDM modem for the physical layer of IEEE 802.11a standard based on Xilinx Virtex-II FPGA}, url = {http://dx.doi.org/10.1109/VETECS.2004.1390560}, volume = {3}, year = {2004} }

TY - CONF ID - citeulike:3396291 L3 - citeulike-article-id:3396291 N2 - A prototype design, which is based on the orthogonal frequency division multiplexing (OFDM) technique, is presented for the physical layer of the IEEE 802.11a standard. Implementation aspects of an OFDM modem on a Xilinx field programmable gate array (FPGA) are addressed. The system includes synchronization circuitry used for packet detection and time synchronization. The demonstrated design flow shows an approach to implementing and prototyping the architecture of a real-time base-band OFDM modem. This design is efficiently synthesized on a 0.15 μm/0.12 μm CMOS 8-layer metal process Virtex-II FPGA. The resulting hardware implementation is analyzed and simulated for a system clock speed of 72 MHz to verify adequate performance. JF - Vehicular Technology Conference, 2004. VTC 2004-Spring. 2004 IEEE 59th EP - 1772 Vol.3 TI - Implementation of OFDM modem for the physical layer of IEEE 802.11a standard based on Xilinx Virtex-II FPGA VL - 3 T2 - Vehicular Technology Conference, 2004. VTC 2004-Spring. 2004 IEEE 59th SP - 1768 KW - 80211 KW - fpga KW - modem KW - ofdm KW - physical KW - receiver KW - wifi AU - Manavi, F AU - Shayan, YR PY - 2004/// UR - http://dx.doi.org/10.1109/VETECS.2004.1390560 ER -