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	Dynamic interconnection of reconfigurable modules on reconfigurable devices [My Copy] Design & Test of Computers, IEEE In Design & Test of Computers, IEEE, Vol. 22, No. 5. (2005), pp. 443-451. by C. Bobda, C. Bobda, A. Ahmadinia, A. Ahmadinia posted to rc task-communication by hn82123 on 2007-12-15 12:46:46 as
	A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices [My Copy] In RSP '05: Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP'05) (2005), pp. 84-90. by Ali Ahmadinia, Christophe Bobda, Ji Ding, et al.Mateusz Majer, Jurgen Teich, Sandor P. Fekete, Jan C. van der Veen posted to rc task-communication by hn82123 on 2007-12-15 05:12:09 as
	A Runtime Environment for Reconfigurable Hardware Operating Systems [My Copy] Field Programmable Logic and Application (2004), pp. 831-835. by Herbert Walder, Marco Platzner posted to rc task-communication by hn82123 on 2007-12-13 13:32:32 as
	A Virtual Hardware Operating System for the Xilinx XC6200 [My Copy] In FPL '96: Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers (1996), pp. 327-336. by Gordon J. Brebner posted to rc task-communication by hn82123 on 2007-12-13 13:09:28 as
	An FPGA Implementation of Linear Kernel Support Vector Machines [My Copy] In ReConFig (2006), pp. 1-6. by Pina O. Ramfrez, Valdes R. Cristerna, Yanez O. Suarez posted to rc by hn82123 on 2007-12-11 08:18:03 as
	FPGA-Based Educational Platform for Wireless Transmission Using System Generator [My Copy] reconfig, Vol. 0 (2006), pp. 1-9. by Martinez G. E. Torres, Luna J. M. Rivera, Balderas R. E. Navarro posted to rc by hn82123 on 2007-12-11 08:18:03 as
	8-bit CISC Microprocessor Core for Teaching Applications in the Digital Systems Laboratory [My Copy] reconfig, Vol. 0 (2006), pp. 1-5. by De, Ordaz A. Moreno, Vite J. A. Frias, Garcia A. Perez posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Implementation, Simulation and Validation of Dispatching Algorithms for Elevator Systems [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by D. M. Munoz, C. H. Llanos, Ayala M. Rincon, R. van Els posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Datapath and ISA Customization for Soft VLIW Processors [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by M. A. R. Saghir, El M. Majzoub, P. Akl posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Configuration and Programming of Heterogeneous Multiprocessors on a Multi-FPGA System Using TMD-MPI [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by M. Saldana, D. Nunes, E. Ramalho, P. Chow posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Towards the Implementation of Path Concepts for a Reconfigurable Bit-Serial Synchronous Architecture [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by F. Dittmann, A. Rettberg, R. Weber posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA Macros [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by T. von Sydow, M. Korb, B. Neumann, H. Blume, T. G. Noll posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Robust cDNA microarray image processing on a hand-held device [My Copy] reconfig, Vol. 0 (2006), pp. 1-5. by P. Gomez, F. Diaz, B. Belean, et al.R. Malutan, B. Stetter, R. Martinez, V. Rodellar posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Change-driven Image Architecture on FPGA with adaptive threshold for Optical-Flow Computation [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by J. C. Sosa, Gomez R. Fabela, J. A. Boluda, F. Pardo posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Reconfigurable Implementation of Wavelet Integer Lifting Transforms for Image Compression [My Copy] reconfig, Vol. 0 (2006), pp. 1-9. by S. L. Bishop, S. Rai, B. Gunturk, J. L. Trahan, R. Vaidyanathan posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Realization of the sound space environment for the radiation-tolerant space craft [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by H. Kawai, Y. Yamaguchi, M. Yasunaga posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Decision Tree Based FPGA-Architecture for Texture Sea State Classification [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by Lopez S. Estrada, R. Cumplido posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Design Space Exploration for an Adaptive Noise Cancellation Algorithm [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by E. M. de Icaya, V. Rodellar, C. Gonzalez, V. Peinado, V. Garcia posted to rc by hn82123 on 2007-12-11 08:18:03 as
	An FPGA Implementation of the LMS Adaptive Filter for Audio Processing [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by A. Elhossini, S. Areibi, R. Dony posted to rc by hn82123 on 2007-12-11 08:18:03 as
	A GF(24m) Inverter and its Application in a Reconfigurable Tate Pairing Processor [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by M. Keller, R. Ronan, W. Marnane, C. Murphy posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Measuring Leakage Power in Nanometer CMOS 6T-SRAM Cells [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by de Alba, Garcia A. D. Garcia posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by A. Chavan, G. Dukle, B. Graniello, E. Macdonald posted to rc by hn82123 on 2007-12-11 08:18:03 as
	A QCA Implementation of a Configurable Logic Block for an FPGA [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by T. Lantz, E. Peskin posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Bio - Inspired&Traditional Approaches to Obtain Fault Tolerance [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by C. E. G. Salmeron, A. D. G. Garcia, R. F. Acuna posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Digital Hardware Architectures of Kohonen's Self Organizing Feature Maps with Exponential Neighboring Function [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by J. Pena, M. Vanegas, A. Valencia posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Expediting GA-Based Evolution Using Group Testing Techniques for Reconfigurable Hardware [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by R. S. Oreifej, C. A. Sharma, R. F. Demara posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Implementation of a Parallel Algorithm for Protein Pairwise Alignment Using Reconfigurable Computing [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by G. L. Moritz, C. Jory, H. S. Lopes, C. R. E. Lima posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Preliminary Steps Towards Protein Folding Prediction Using Reconfigurable Computing [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by N. B. Armstrong, H. S. Lopes, C. R. E. Lima posted to rc by hn82123 on 2007-12-11 08:18:03 as
	A Physical Resource Management Approach to Minimizing FPGA Partial Reconfiguration Overhead [My Copy] reconfig, Vol. 0 (2006), pp. 1-5. by Heng Tan, R. F. Demara posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Exploring Non-Traditional Hardware-Software Interaction [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by J. A. Suris, P. Athanas posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Tuning Coarse-Grained Reconfigurable Architectures towards an Application Domain [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by J. O. Filho, T. Schweizer, T. Oppold, T. Kuhn, W. Rosenstiel posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Executing Algorithms for Dynamic Dataflow Reconfigurable Hardware -The Operators Protocol [My Copy] reconfig, Vol. 0 (2006), pp. 1-7. by Luiz, E. Marques posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Communication Interface Generation For HW/SW Architecture In The STARSoC Environment [My Copy] reconfig, Vol. 0 (2006), pp. 1-6. by A. Samahi, E. B. Bourennane, S. Boukhechem posted to rc by hn82123 on 2007-12-11 08:18:03 as
	FASE: An Open Run-Time Reconfigurable FPGA Architecture for Tamper-Resistant and Secure Embedded Systems [My Copy] reconfig, Vol. 0 (2006), pp. 1-9. by Sumanta Chaudhuri, J. L. Danger, S. Guilley, P. Hoogvorst posted to rc by hn82123 on 2007-12-11 08:18:03 as
	A Reconfigurable Simulation Framework for Financial Computation [My Copy] reconfig, Vol. 0 (2006), pp. 1-9. by J. A. Bower, D. B. Thomas, W. Luk, O. Mencer posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by M. V. Silva, R. Ferreira, A. Garcia posted to rc by hn82123 on 2007-12-11 08:18:03 as
	Reconfigurable Microkernel-based RTOS: Mechanisms and Methods for Run-Time Reconfiguration [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by M. Gotz, F. Dittmann posted to rc by hn82123 on 2007-12-11 08:18:03 as
	A Self-Reconfigurable Multimedia Player on FPGA [My Copy] reconfig, Vol. 0 (2006), pp. 1-6. by J. Castillo, P. Huerta, C. Pedraza, J. I. Martinez posted to rc by hn82123 on 2007-12-11 08:18:03 as
	The Growing Complexity of FPGA CAD Tools [My Copy] reconfig, Vol. 0 (2006) by D. Karchmer posted to rc by hn82123 on 2007-12-11 08:18:03 as
	GF(2m) Arithmetic Modules for Elliptic Curve Cryptography [My Copy] reconfig, Vol. 0 (2006), pp. 1-8. by Morales M. Sandoval, Feregrino C. Uribe posted to rc by hn82123 on 2007-12-11 08:10:57 as
	Real Time FPGA-based Architecture for Video Applications [My Copy] reconfig, Vol. 0 (2006), pp. 1-10. by G. Saldana, Arias M. Estrada posted to rc by hn82123 on 2007-12-11 08:10:57 as
	Hardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures [My Copy] Field Programmable Logic and Application (2004), pp. 842-846. by Björn Griese, Erik Vonnahme, Mario Porrmann, Ulrich Rückert posted to no-tag by hn82123 on 2009-04-23 07:48:53 as
	Hardware/Software Implementation of a Discrete Cosine Transform Algorithm Using SystemC [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by A. Avila, R. Santoyo, S. O. Martinez, G. Dieck posted to rc by hn82123 on 2007-12-11 08:33:03 as
	An FPGA-Based Coprocessor for the SPHINX Speech Recognition System: Early Experiences [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by Guillermo Marcus, Juan posted to rc by hn82123 on 2007-12-11 08:33:03 as
	FPGA Implementation of an Efficient Multiplier over Finite Fields GF(2^m) [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by Mario, Rub¨¦n P. G¨®mez, Guillermo M. Luna, Francisco R. Henr¨ªquez posted to rc by hn82123 on 2007-12-11 08:33:03 as
	Hierarchical FPGA Clustering Based on a Multilevel Partitioning Approach to Improve Routability and Reduce Power Dissapation [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by Zied Marrakchi, Hayder Mrabet, Habib Mehrez posted to rc by hn82123 on 2007-12-11 08:33:03 as
	VHDL Core for 1024-Point Radix-4 FFT Computation [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by Jose, Rene, Alejandro O. Moreno posted to rc by hn82123 on 2007-12-11 08:33:03 as
	Design and Implementation of an Embedded Microprocessor Compatible with IL Language in Accordance to the Norm IEC 61131-3 [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by Snaider Carrillo, Agenor Polo, Mario Esmeral posted to rc by hn82123 on 2007-12-11 08:33:03 as
	On the Design of an FPGA-Based OFDM Modulator for IEEE 802.16-2004 [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by Joaqu¨ªn Garc¨ªa, Ren¨¦ Cumplido posted to rc by hn82123 on 2007-12-11 08:33:03 as
	A Novel FPGA Implementation of a Welding Control Using a New Bus Architecture [My Copy] In 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) (2005) by K. Rauma, J. Luukko, T. H?rk?nen, I. Pajari, O. Pyrh?nen posted to rc by hn82123 on 2007-12-11 08:33:03 as

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