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The Phoenix Processor: A 30pW platform for sensor applicationsby: Mingoo Seok, S. Hanson, Yu-Shiang Lin, Zhiyoong Foo, Daeyeon Kim, Yoonmyung Lee, Nurrachman Liu, D. Sylvester, D. Blaauw
VLSI Circuits, 2008 IEEE Symposium on In VLSI Circuits, 2008 IEEE Symposium on (2008), pp. 188-189.
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AbstractAn integrated platform for sensor applications, called the Phoenix Processor, is implemented in a carefully-selected 0.18 mum process with an area of 915 times 915 mum<sup>2</sup>, making on-die battery integration feasible. Phoenix uses a comprehensive sleep strategy with a unique power gating approach, an event-driven CPU with compact ISA, data memory compression, a custom low leakage memory cell, and adaptive leakage management in data memory. Measurements show that Phoenix consumes 29.6 pW in sleep mode and 2.8 pJ/cycle in active mode.
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