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In Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on (December 2011), pp. 719-722, doi:10.1109/icecs.2011.6122375 Key: citeulike:11450096
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Efficient embedded computing requires extended compiler awareness of the underlying hardware platform: execution time and energy consumption estimates should guide optimization. Conventional compilers employ rough (energy-unaware) estimates for fast decision making. Real-time compilers quickly determine bounds for WCET, but ignore energy. Embedded compilers accurately estimate average time/energy but require time-consuming profiling. We propose a novel estimation method based on energy-aware Abstract Interpretation from cache configuration and target technology. Our estimates exhibit derivatives that are as accurate as those obtained by profiling, but are computed at least 1000 times faster, being suitable for driving embedded code optimizations through iterative improvement.
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