Bidwidth analysis with application to silicon compilation Export

@inproceedings{citeulike:3328706, abstract = {This paper introduces Bitwise , a compiler that minimizes the bitwidth the number of bits used to represent each operand for both integers and pointers in a program. By propagating 70 static information both forward and backward in the program dataflow graph, Bitwise frees the programmer from declaring bitwidth invariants in cases where the compiler can determine bitwidths automatically. Because loop instructions comprise the bulk of dynamically executed instructions, Bitwise incorporates sophisticated loop analysis techniques for identifying bitwidths. We find a rich opportunity for bitwidth reduction in modern multimedia and streaming application workloads. For new architectures that support sub-word data-types, we expect that our bitwidth reductions will save power and increase processor performance. This paper also applies our analysis to silicon compilation, the translation of programs into custom hardware, to realize the full benefits of bitwidth reduction. We describe our integration of Bitwise with the DeepC Silicon Compiler. By taking advantage of bitwidth information during architectural synthesis, we reduce silicon real estate by 15 - 86\%, improve clock speed by 3 - 249\%, and reduce power by 46 - 73\%. The next era of general purpose and reconfigurable architectures should strive to capture a portion of these gains.}, address = {New York, NY, USA}, author = {Stephenson, Mark and Babb, Jonathan and Amarasinghe, Saman}, booktitle = {PLDI '00: Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation}, citeulike-article-id = {3328706}, citeulike-linkout-0 = {http://portal.acm.org/citation.cfm?id=349299.349317}, citeulike-linkout-1 = {http://dx.doi.org/10.1145/349299.349317}, doi = {10.1145/349299.349317}, isbn = {1-58113-199-2}, keywords = {compiler\_design, fixedpoint, high\_level\_synthesis, vlsi\_design}, location = {Vancouver, British Columbia, Canada}, pages = {108--120}, posted-at = {2008-09-24 10:05:45}, priority = {2}, publisher = {ACM}, title = {Bidwidth analysis with application to silicon compilation}, url = {http://dx.doi.org/10.1145/349299.349317}, year = {2000} }

TY - CONF ID - citeulike:3328706 L3 - citeulike-article-id:3328706 N2 - This paper introduces Bitwise , a compiler that minimizes the bitwidth the number of bits used to represent each operand for both integers and pointers in a program. By propagating 70 static information both forward and backward in the program dataflow graph, Bitwise frees the programmer from declaring bitwidth invariants in cases where the compiler can determine bitwidths automatically. Because loop instructions comprise the bulk of dynamically executed instructions, Bitwise incorporates sophisticated loop analysis techniques for identifying bitwidths. We find a rich opportunity for bitwidth reduction in modern multimedia and streaming application workloads. For new architectures that support sub-word data-types, we expect that our bitwidth reductions will save power and increase processor performance. This paper also applies our analysis to silicon compilation, the translation of programs into custom hardware, to realize the full benefits of bitwidth reduction. We describe our integration of Bitwise with the DeepC Silicon Compiler. By taking advantage of bitwidth information during architectural synthesis, we reduce silicon real estate by 15 - 86%, improve clock speed by 3 - 249%, and reduce power by 46 - 73%. The next era of general purpose and reconfigurable architectures should strive to capture a portion of these gains. CY - Vancouver, British Columbia, Canada SN - 1-58113-199-2 AD - New York, NY, USA EP - 120 TI - Bidwidth analysis with application to silicon compilation PB - ACM T2 - PLDI '00: Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation SP - 108 KW - compiler_design KW - fixedpoint KW - high_level_synthesis KW - vlsi_design AU - Stephenson, Mark AU - Babb, Jonathan AU - Amarasinghe, Saman PY - 2000/// UR - http://dx.doi.org/10.1145/349299.349317 ER -