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	Maxwell - a 64 FPGA Supercomputer [My Copy] Adaptive Hardware and Systems, 2007. AHS 2007. Second NASA/ESA Conference on In Adaptive Hardware and Systems, 2007. AHS 2007. Second NASA/ESA Conference on (2007), pp. 287-294. by R. Baxter, S. Booth, M. Bull, et al.G. Cawood, J. Perry, M. Parsons, A. Simpson, A. Trew, A. Mccormick, G. Smart, R. Smart, A. Cantle, R. Chamberlain, G. Genest posted to fpgasupercomputing reconfigurable_computing reconfigurable_platforms by mmuecke on 2008-08-07 08:26:14 as along with 1 group Reconfigurable Computing
	Anton, a special-purpose machine for molecular dynamics simulation [My Copy] Commun. ACM, Vol. 51, No. 7. (July 2008), pp. 91-97. by David E. Shaw, Martin M. Deneroff, Ron O. Dror, et al.Jeffrey S. Kuskin, Richard H. Larson, John K. Salmon, Cliff Young, Brannon Batson, Kevin J. Bowers, Jack C. Chao, Michael P. Eastwood, Joseph Gagliardo, J. P. Grossman, Richard C. Ho, Douglas J. Lerardi, István Kolossváry, John L. Klepeis, Timothy Layman, Christine Mcleavey, Mark A. Moraes, Rolf Mueller, Edward C. Priest, Yibing Shan, Jochen Spengler, Michael Theobald, Brian Towles, Stanley C. Wang posted to molecular_dynamics reconfigurable_platforms vlsi_design by mmuecke on 2008-07-01 13:31:27 as along with 3 people ariels apaydin cwr
	A Hardware-friendly Support Vector Machine for Embedded Automotive Applications [My Copy] Neural Networks, 2007. IJCNN 2007. International Joint Conference on In Neural Networks, 2007. IJCNN 2007. International Joint Conference on (2007), pp. 1360-1364. by D. Anguita, A. Ghio, S. Pischiutta, S. Ridella posted to fixedpoint svm by mmuecke on 2008-06-25 16:28:53 as
	Understanding the Impact of Multi-Core Architecture in Cluster Computing: A Case Study with Intel Dual-Core System [My Copy] Cluster Computing and the Grid, 2007. CCGRID 2007. Seventh IEEE International Symposium on In Cluster Computing and the Grid, 2007. CCGRID 2007. Seventh IEEE International Symposium on (2007), pp. 471-478. by Lei Chai, Qi Gao, Dhabaleswar K. Panda posted to mpi by mmuecke on 2008-02-11 08:33:22 as along with 1 person kzk_mover
	Productivity of High-Level Languages on Reconfigurable Computers: An HPC Perspective [My Copy] Field-Programmable Technology, 2007. ICFPT 2007. International Conference on In Field-Programmable Technology, 2007. ICFPT 2007. International Conference on (2007), pp. 257-260. by Esam El-Araby, Preetham Nosum, Tarek El-Ghazawi posted to electronics_design_automation hdl high_level_synthesis language_design parallel_programming reconfigurable_computing by mmuecke on 2008-02-07 07:06:34 as along with 2 people ericschung hannibal_08
	What is the right model for programming and using modern FPGAs? [My Copy] In FPGA '04: Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays (2004), pp. 119-119. by Andre Dehon, Brad Hutchings, Daryl Rudusky, et al.James Hwang, Nikhil, Salil Raje, Adrian Stoica posted to electronics_design_automation fpga parallel_programming by mmuecke on 2008-01-30 18:56:22 as
	Special Issue High Performance Parallel Functional Programming [My Copy] J. Funct. Program., Vol. 15, No. 3. (May 2005), pp. 351-352. by P. W. Trinder posted to functional high-performance_computing parallel_programming by mmuecke on 2008-01-27 15:56:37 as
	SAC: a functional array language for efficient multi-threaded execution [My Copy] Int. J. Parallel Program., Vol. 34, No. 4. (August 2006), pp. 383-427. by Clemens Grelck, Sven-Bodo Scholz posted to functional high-performance_computing language_design parallel_programming by mmuecke on 2008-01-24 11:27:21 as
	Adaptive Load Balancing for MPI Programs [My Copy] Computational Science - ICCS 2001 (2001), pp. 108-117. by Milind Bhandarkar, L. Kalé, Eric de Sturler, Jay Hoeflinger posted to mpi by mmuecke on 2008-01-18 17:27:11 as
	The design and development of ZPL [My Copy] In HOPL III: Proceedings of the third ACM SIGPLAN conference on History of programming languages (2007) by Lawrence Snyder posted to communication_algorithms compiler_design language_design parallel_programming by mmuecke on 2008-01-17 11:10:56 as
	STAR-MPI: self tuned adaptive routines for MPI collective operations [My Copy] In ICS '06: Proceedings of the 20th annual international conference on Supercomputing (2006), pp. 199-208. by Ahmad Faraj, Xin Yuan, David Lowenthal posted to mpi mpi_tools by mmuecke on 2007-12-13 11:09:48 as
	Reconfigurable computing: architectures and design methods [My Copy] Computers and Digital Techniques, IEE Proceedings-, Vol. 152, No. 2. (2005), pp. 193-207. by T. J. Todman, G. A. Constantinides, S. J. E. Wilton, O. Mencer, W. Luk, P. Y. K. Cheung posted to reconfigurable_computing reconfigurable_platforms survey by mmuecke on 2007-12-13 08:27:31 as along with 12 people and 2 groups dcastro mzabidi hannibal_08 gantlord rahul deepaka nevarcds reactgary berndi smithmc hn82123 assad79 SRL Reconfigurable Computing
	Towards a general framework for FPGA based image processing using hardware skeletons [My Copy] Parallel Comput., Vol. 28, No. 7-8. (2002), pp. 1141-1154. by K. Benkrid, D. Crookes, A. Benkrid posted to compiler_design fpga hdl hdl_tool high_level_synthesis image_processing parallel_programming by mmuecke on 2007-10-02 07:27:48 as
	Hardware Design and Functional Programming: a Perfect Match [My Copy] by Mary Sheeran posted to functional hdl language_design parallel_programming survey vlsi_design by mmuecke on 2007-09-27 18:57:17 as along with 2 people SamB spl
	A reflective functional language for hardware design and theorem proving [My Copy] J. Funct. Program., Vol. 16, No. 2. (March 2006), pp. 157-196. by Jim Grundy, Tom Melham, John O'Leary posted to functional hdl high_level_synthesis by mmuecke on 2007-09-27 18:45:44 as along with 1 person glutamate
	Hardware Synthesis from Term Rewriting Systems [My Copy] In VLSI '99: Proceedings of the IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (2000), pp. 595-619. by James C. Hoe, Arvind posted to formal_synthesis hdl hdl_tool high_level_synthesis by mmuecke on 2007-09-27 15:11:10 as
	Efficient FPGA hardware development: A multi-language approach [My Copy] J. Syst. Archit., Vol. 53, No. 4. (April 2007), pp. 184-209. by K. Benkrid, A. Benkrid, S. Belkacemi posted to hdl high_level_synthesis by mmuecke on 2007-06-04 18:09:50 as
	A methodology for generating verified combinatorial circuits [My Copy] In EMSOFT '04: Proceedings of the 4th ACM international conference on Embedded software (2004), pp. 249-258. by Oleg Kiselyov, Kedar N. Swadi, Walid Taha posted to dsl hdl high_level_synthesis multi_stage_programming by mmuecke on 2007-06-04 17:52:32 as
	Truly rapid prototyping requires high level synthesis [My Copy] Rapid System Prototyping, 1998. Proceedings. 1998 Ninth International Workshop on (1998), pp. 101-106. by G. Doncev, M. Leeser, S. Tarafdar posted to fpga hdl high_level_synthesis vhdl by mmuecke on 2006-12-06 09:25:16 as
	Control and data flow graph extraction for high-level synthesis [My Copy] VLSI, 2004. Proceedings. IEEE Computer society Annual Symposium on (2004), pp. 187-192. by R. Namballa, N. Ranganathan, A. Ejnioui posted to dfg high_level_synthesis vhdl by mmuecke on 2006-11-23 17:15:17 as
	Deductive Hardware Design: A Functional Approach [My Copy] by Bernhard Möller posted to functional hdl by mmuecke on 2006-11-02 09:02:58 as
	Reconfigurable Computing for Digital Signal Processing: A Survey [My Copy] The Journal of VLSI Signal Processing, Vol. 28, No. 1 - 2. (May 2001), pp. 7-27. by Russell Tessier, Wayne Burleson posted to dsp_on_fpga reconfigurable_computing survey vlsi_design by mmuecke on 2008-09-24 09:58:07 as along with 4 people and 1 group mzabidi gantlord Seenu peskin Reconfigurable Computing
	Affine Arithmetic: Concepts and Applications: SCAN2002 International Conference (Guest Editors: Rene Alt and Jean-Luc Lamotte) [My Copy] Numerical Algorithms, Vol. 37, No. 1-4., 147. by Luiz H. de Figueiredo, Jorge Stolfi posted to error_analysis interval_arithmetic by mmuecke on 2008-07-09 14:32:00 as
	Parallelizing Molecular Dynamics Programs for Distributed-Memory Machines [My Copy] IEEE Comput. Sci. Eng., Vol. 2, No. 2. (June 1995), pp. 18-29. by Yuan-Shin Hwang, Raja Das, Joel H. Saltz, Milan Hodoscek, Bernard R. Brooks posted to charmm high-performance_computing by mmuecke on 2007-12-11 10:11:54 as
	Exchanging messages of different sizes [My Copy] J. Parallel Distrib. Comput., Vol. 66, No. 1. (January 2006), pp. 1-18. by Alfredo Goldman, Joseph G. Peters, Denis Trystram posted to communication_algorithms high-performance_computing mpi by mmuecke on 2007-12-11 10:09:05 as
	Stream-Oriented FPGA Computing in the Streams-C High Level Language [My Copy] In FCCM '00: Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (2000) by Maya B. Gokhale, Janice M. Stone, Jeff Arnold, Mirek Kalinowski posted to compiler_design hdl hdl_tool high_level_synthesis parallel_programming vhdl by mmuecke on 2007-10-04 22:40:08 as
	Compiling and Optimizing Image Processing Algorithms for FPGAs [My Copy] In CAMP '00: Proceedings of the Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00) (2000) by B. Draper, W. Najjar, W. Bohm, et al.J. Hammes, B. Rinker, C. Ross, M. Chawathe, J. Bins posted to dfg hdl image_processing by mmuecke on 2007-02-23 10:49:52 as
	Protein Explorer: A Petaflops Special-Purpose Computer System for Molecular Dynamics Simulations [My Copy] In SC '03: Proceedings of the 2003 ACM/IEEE conference on Supercomputing (2003) by Makoto Taiji, Tetsu Narumi, Yousuke Ohno, et al.Noriyuki Futatsugi, Atsushi Suenaga, Naoki Takada, Akihiko Konagaya posted to bioinformatics high-performance_computing by mmuecke on 2006-11-28 13:00:33 as
	What's next in high-performance computing? [My Copy] Commun. ACM, Vol. 45, No. 2. (February 2002), pp. 91-95. by Gordon Bell, Jim Gray posted to high-performance_computing by mmuecke on 2006-11-28 12:52:26 as
	A model for the high-level description and simulation of VLSI networks [My Copy] Micro, IEEE, Vol. 10, No. 4. (1990), pp. 41-48. by A. J. van der Hoeven, A. A. J. de Lange, E. F. Deprettere, P. M. Dewilde posted to hdl by mmuecke on 2006-11-27 14:46:58 as
	A domain specific interconnect for reconfigurable computing [My Copy] In LCTES '08: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems (2008), pp. 79-88. by Sanjay Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayana posted to reconfigurable_computing by mmuecke on 2008-06-16 15:24:16 as
	Using Performance Modeling to Design Large-Scale Systems [My Copy] Computer, Vol. 42, No. 11. (13 November 2009), pp. 42-49. by Kevin J. Barker, Kei Davis, Adolfy Hoisie, et al.Darren J. Kerbyson, Michael Lang, Scott Pakin, Jos&#x0E9 Sancho, Carlos posted to performance_modelling modelling high-performance_computing by mmuecke on 2009-11-19 16:03:56 as
	Dynamic Multicore Resource Management: A Machine Learning Approach [My Copy] Micro, IEEE, Vol. 29, No. 5. (10 November 2009), pp. 8-17. by Jose F. Martinez, Engin Ipek posted to multicore modelling machine_learning by mmuecke on 2009-11-19 15:56:02 as
	A Benchmark Characterization of the EEMBC Benchmark Suite [My Copy] Micro, IEEE, Vol. 29, No. 5. (10 November 2009), pp. 18-29. by Jason A. Poovey, Thomas M. Conte, Markus Levy, Shay Gal-On posted to benchmark architecture_comparison by mmuecke on 2009-11-19 15:39:33 as
	MPI Peruse 2.0 - A Performance Revealing Extensions Interface to MPI [My Copy] (March 2006) edited by Terry Jones posted to mpi_tools mpi by mmuecke on 2009-11-18 09:05:16 as
	Test suite for evaluating performance of multithreaded MPI communication [My Copy] Parallel Computing (30 January 2009) by Rajeev Thakur, William Gropp posted to performance_analysis mpi by mmuecke on 2009-11-17 09:10:01 as
	Running Relative Error for the Evaluation of Polynomials [My Copy] SIAM Journal on Scientific Computing, Vol. 31, No. 5. (2009), pp. 3905-3921. by Jorge Delgado, J. M. Pena posted to error_analysis by mmuecke on 2009-11-17 08:30:38 as
	Accurate Uncertainty Quantification Using Inaccurate Computational Models [My Copy] SIAM Journal on Scientific Computing, Vol. 31, No. 5. (2009), pp. 3274-3300. by Phaedon S. Koutsourelakis posted to modelling high-performance_computing by mmuecke on 2009-11-17 08:23:36 as
	Using Dynamic Tracing Sampling to Measure Long Running Programs [My Copy] In SC '05: Proceedings of the 2005 ACM/IEEE conference on Supercomputing (2005), 59. by Jeffrey Odom, Jeffrey K. Hollingsworth, Luiz DeRose, Kattamuri Ekanadham, Simone Sbaraglia posted to performance_analysis high-performance_computing by mmuecke on 2009-11-12 17:09:37 as
	Detecting Application Load Imbalance on High End Massively Parallel Systems [My Copy] Euro-Par 2007 Parallel Processing In Euro-Par 2007 Parallel Processing Conference (2007), pp. 150-159. by Luiz DeRose, Bill Homer, Dean Johnson posted to performance_modelling performance_analysis mpi_tools mpi high-performance_computing communication_algorithms by mmuecke on 2009-11-12 17:07:03 as
	Power-aware computing [My Copy] Computer, Vol. 36, No. 12. (19 December 2003), pp. 35-38. by M. R. Stan, K. Skadron posted to powerefficient_computing by mmuecke on 2009-11-12 16:42:51 as
	Vforce: An Extensible Framework for Reconfigurable Supercomputing [My Copy] Computer, Vol. 40, No. 3. (19 March 2007), pp. 39-49. by N. Moore, A. Conti, M. Leeser, L. S. King posted to middle_ware fpgasupercomputing by mmuecke on 2009-11-12 16:27:41 as along with 3 people hamish peskin smithmc
	Accelerating Compute-Intensive Applications with GPUs and FPGAs [My Copy] Application Specific Processors, 2008. SASP 2008. Symposium on (18 July 2008), pp. 101-107. by Shuai Che, Jie Li, J. W. Sheaffer, K. Skadron, J. Lach posted to performance_analysis architecture_comparison by mmuecke on 2009-11-12 15:35:39 as
	Rodinia: A benchmark suite for heterogeneous computing [My Copy] Workload Characterization, 2009. IISWC 2009. IEEE International Symposium on In IEEE International Symposium on Workload Characterization, 2009. IISWC 2009. (30 October 2009), pp. 44-54. by Shuai Che, Michael Boyer, Jiayuan Meng, et al.David Tarjan, Jeremy W. Sheaffer, Sang-Ha Lee, Kevin Skadron posted to performance_modelling performance_analysis benchmark by mmuecke on 2009-11-12 15:24:31 as
	An FPGA-specific approach to floating-point accumulation and sum-of-products [My Copy] ICECE Technology, 2008. FPT 2008. International Conference on In ICECE Technology, 2008. FPT 2008. International Conference on (27 January 2009), pp. 33-40. by Florent de Dinechin, B. Pasca, O. Cret, R. Tudoran posted to fpga floating_point by mmuecke on 2009-11-06 16:33:09 as along with 1 person peskin
	SVM speaker verification system based on a low-cost FPGA [My Copy] Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on (29 September 2009), pp. 582-586. by R. Ramos-Lara, M. Lopez-Garcia, E. Canto-Navarro, L. Puente-Rodriguez posted to svm fpga floating_point by mmuecke on 2009-11-06 16:27:52 as
	A Floating-Point Unit for 4D Vector Inner Product with Reduced Latency [My Copy] Computers, IEEE Transactions on, Vol. 58, No. 7. (17 November 2008), pp. 890-901. by Donghyun Kim, Lee-Sup Kim posted to vlsi_design linear_algebra floating_point by mmuecke on 2009-11-06 15:05:48 as
	On the design of IEEE compliant floating point units [My Copy] Computers, IEEE Transactions on, Vol. 49, No. 5. (06 August 2002), pp. 398-413. by G. Even, W. J. Paul posted to vlsi_design verification floating_point by mmuecke on 2009-11-06 15:03:45 as
	A Note on Constant-Free A Posteriori Error Estimates [My Copy] SIAM Journal on Numerical Analysis, Vol. 47, No. 4. (2009), pp. 3180-3194. by R. Verfürth posted to error_analysis by mmuecke on 2009-10-21 07:23:51 as
	The Mailman algorithm: A note on matrix--vector multiplication [My Copy] Inf. Process. Lett., Vol. 109, No. 3. (2009), pp. 179-182. by Edo Liberty, Steven W. Zucker posted to matrix by mmuecke on 2009-10-20 08:31:18 as

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high-performance_computing	77
fpga	74
hdl	74
high_level_synthesis	66
floating_point	64
mpi	61
performance_analysis	52
parallel_programming	48
reconfigurable_computing	41
survey	39
computer_architecture	33
error_analysis	28
fpgas_in_hep	28
vlsi_design	28
fpgasupercomputing	27
fixedpoint	26
functional	26
vhdl	25
dsl	24
language_design	23
mpi_tools	23
trends	23
matrix	22
molecular_dynamics	22
reconfigurable_platforms	20
image_processing	19
compiler_design	18
bioinformatics	17
hdl_tool	17
dfg	16
numa	16
communication_algorithms	15
scientific_publishing	15
book	14
architecture_comparison	13
electronics_design_automation	13
mixed_precision	13
charmm	12
dsp_on_fpga	12
formal_language_theory	11
linear_algebra	11
multicore	11
svm	11
fft	10
teaching	10
interval_arithmetic	8
performance_modelling	8
matrix_sparse	7
molecular_docking	7
parallel_algorithms	7
signal_processing_theory	7
sopc	7
systemc	7
term_rewriting	7
computer_arithmetic	6
lhcb	6
lhc_transversefeedbacksystem	6
verification	6
genomesequencing	5
vlsi_design_theory	5
adl	4
benchmark	4
case_study	4
formal_synthesis	4
gpu	4
hw_ip_reuse	4
infiniband	4
open_source_eda	4
protein_sequences	4
cell_cpu	3
confluence	3
language_embedding	3
middle_ware	3
modelling	3
unix_linux_solaris	3
analog_computing	2
generative_programming	2
people	2
powerefficient_computing	2
structural_computing	2
wsn	2
echo_state_networks	1
fpaa	1
graph_theory	1
image_feature_descriptors	1
machine_learning	1
mixed_signal	1
multi_stage_programming	1
nuclear_fusion	1
pde_solvers	1
quantization_noise	1
run-time_reconfiguration	1

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