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mmuecke's fpga [53 articles]

Recent papers added to mmuecke's library classified by the tag fpga. You can also see everyone's fpga.
  • Developing FPGA Coprocessors for Performance-Accelerated Spacecraft Image Processing
    XCell (2008)
    by Paula J Pingree, Lucas J Scharenbroich, Thomas A Werne, David Pellerin
    posted to svm reconfigurable_computing fpga electronics_design_automation by mmuecke on 2008-06-03 09:45:53 as **
  • Trident: From High-Level Language to Hardware Circuitry
    Computer, Vol. 40, No. 3. (2007), pp. 28-37.
    by Justin L Tripp, Maya B Gokhale, Kristopher D Peterson
    posted to high_level_synthesis fpga electronics_design_automation by mmuecke on 2008-05-27 10:37:41 as ** along with 2 people hamish peskin
  • A digital architecture for support vector machines: theory, algorithm, and FPGA implementation
    Neural Networks, IEEE Transactions on, Vol. 14, No. 5. (2003), pp. 993-1009.
    by D Anguita, A Boni, S Ridella
    posted to fpga dsp_on_fpga by mmuecke on 2008-05-05 09:38:07 as **
  • An FPGA-based VLIW processor with custom hardware execution
    (2005), pp. 107-117.
    by Alex K Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster
    posted to computer_architecture electronics_design_automation fpga high_level_synthesis reconfigurable_computing reconfigurable_platforms vhdl by mmuecke on 2008-04-10 09:46:03 as **
  • A Library of Parameterized Floating-Point Modules and Their Use
    Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream (2002), pp. 657-666.
    by Pavle Belanović, Miriam Leeser
    posted to floating_point fpga fpgasupercomputing by mmuecke on 2008-04-08 22:34:17 as **
  • Parameterized floating-point logarithm and exponential functions for FPGAs
    Microprocess. Microsyst., Vol. 31, No. 8. (December 2007), pp. 537-545.
    by Jérémie Detrey, Florent de Dinechin
    posted to floating_point fpga fpgasupercomputing by mmuecke on 2008-04-08 22:30:58 as **
  • Floating point unit generation and evaluation for FPGAs
    Field-Programmable Custom Computing Machines, 2003. FCCM 2003. 11th Annual IEEE Symposium on (2003), pp. 185-194.
    by Jian Liang, R Tessier, O Mencer
    posted to floating_point fpga fpgasupercomputing by mmuecke on 2008-04-08 22:24:37 as **
  • notes Vector processing as a soft-core CPU accelerator
    (2008), pp. 222-232.
    by Jason Yu, Guy Lemieux, Christpher Eagleston
    posted to electronics_design_automation fpga hdl_tool high_level_synthesis by mmuecke on 2008-03-17 16:04:35 as **
  • CHiMPS: a high-level compilation flow for hybrid CPU-FPGA architectures
    (2008), pp. 261-261.
    by Andrew R Putnam, Dave Bennett, Eric Dellinger, Jeff Mason, Prasanna Sundararajan
    posted to electronics_design_automation fpga high_level_synthesis by mmuecke on 2008-03-17 15:56:25 as **
  • Pipelined Mixed Precision Algorithms on FPGAs for Fast and Accurate PDE Solvers from Low Precision Components
    Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on (2006), pp. 259-270.
    by Robert Strzodka, Dominik Goddeke
    posted to floating_point fpga mixed_precision by mmuecke on 2008-03-11 11:15:02 as **
  • Development of SEU-robust, radiation-tolerant and industry-compatible programmable logic components
    Journal of Instrumentation, Vol. 2, No. 09. (2007), pp. P09009-P09009.
    by S Bonacini, K Kloukinas, A Marchioro
    posted to fpga fpgas_in_hep vlsi_design by mmuecke on 2008-03-10 13:51:19 as **
  • An SEU-Robust Configurable Logic Block for the Implementation of a Radiation-Tolerant FPGA
    Nuclear Science, IEEE Transactions on, Vol. 53, No. 6. (2006), pp. 3408-3416.
    by S Bonacini, F Faccio, K Kloukinas, A Marchioro
    posted to fpga fpgas_in_hep vlsi_design by mmuecke on 2008-03-07 17:02:42 as **
  • Digital Circuit Analysis and Design with an Introduction to CPLDs and FPGAs
    (15 November 2005)
    by Steven T Karris
    posted to book computer_architecture fpga teaching vlsi_design by mmuecke on 2008-02-07 09:43:37 as **
  • Binary synthesis
    ACM Trans. Des. Autom. Electron. Syst., Vol. 12, No. 3. (August 2007)
    by Greg Stitt, Frank Vahid
    posted to compiler_design electronics_design_automation fpga reconfigurable_computing survey by mmuecke on 2008-02-07 06:50:15 as **
  • Comparing computing machines
    Configurable Computing: Technology and Applications, Vol. 3526, No. 1. (1998), pp. 124-133.
    by Andre Dehon
    edited by John Schewel
    posted to architecture_comparison computer_architecture fpga reconfigurable_platforms by mmuecke on 2008-01-31 13:20:27 as **
  • What is the right model for programming and using modern FPGAs?
    (2004), pp. 119-119.
    by Andre Dehon, Brad Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica
    posted to electronics_design_automation fpga parallel_programming by mmuecke on 2008-01-30 18:56:22 as *****
  • Reconfigurable architectures for bio-sequence database scanning on FPGAs
    Circuits and Systems II: Express Briefs, IEEE Transactions on [see also Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on], Vol. 52, No. 12. (2005), pp. 851-855.
    by TF Oliver, B Schmidt, DL Maskell
    posted to bioinformatics fpga protein_sequences reconfigurable_computing by mmuecke on 2008-01-30 18:34:00 as **
  • Application Development on Hybrid Systems
    Proceedings of Supercomputin 07
    by Roger D Chamberlain, Eric J Tyson, Saurabh Gayen, Mark A Franklin, Jeremy Buhler, Patrick Crowley, James H Buckley
    posted to computer_architecture dfg fpga fpgasupercomputing high-performance_computing reconfigurable_computing by mmuecke on 2007-12-19 15:51:51 as ** along with 1 person iriX
  • A Study of Design Efficiency with a High-Level Language for FPGAs
    Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International (2007), pp. 1-7.
    by Zain-Ul-Abdin, B Svensson
    posted to fpga hdl high_level_synthesis by mmuecke on 2007-11-27 00:24:49 as **
  • A Reconfigurable Load Balancing Architecture for Molecular Dynamics
    Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International (2007), pp. 1-6.
    by J Phillips, M Areno, C Rogers, A Dasu, B Eames
    posted to fpga molecular_dynamics by mmuecke on 2007-11-27 00:19:28 as **
  • 3-D nFPGA: A Reconfigurable Architecture for 3-D CMOS/Nanomaterial Hybrid Digital Circuits
    Circuits and Systems I: Regular Papers, IEEE Transactions on [Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on], Vol. 54, No. 11. (2007), pp. 2489-2501.
    by C Dong, D Chen, S Haruehanroengra, W Wang
    posted to fpga vlsi_design by mmuecke on 2007-11-19 13:34:09 as **
  • Reconfigurable computing: a survey of systems and software
    ACM Comput. Surv., Vol. 34, No. 2. (June 2002), pp. 171-210.
    by Katherine Compton, Scott Hauck
    posted to fpga reconfigurable_computing reconfigurable_platforms survey trends by mmuecke on 2007-10-22 08:37:03 as ** along with 9 people and 3 groups sonofnel peskin iammealva Seenu clarence silvangraf smithmc periodic hn82123 RC_FCU Reconfigurable Computing infolab, USTC
  • Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions
    Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on (2006), pp. 45-56.
    by David Lau, Orion Pritchard, Philippe Molson
    posted to fpga reconfigurable_computing sopc by mmuecke on 2007-10-11 23:00:23 as ** along with 1 person visit0r
  • Towards a general framework for FPGA based image processing using hardware skeletons
    Parallel Comput., Vol. 28, No. 7-8. (2002), pp. 1141-1154.
    by K Benkrid, D Crookes, A Benkrid
    posted to compiler_design fpga hdl hdl_tool high_level_synthesis image_processing parallel_programming by mmuecke on 2007-10-02 07:27:48 as *****
  • Memory Access Optimization and RAM Inference for Pipeline Vectorization
    Field Programmable Logic and Applications (1999), pp. 61-70.
    by Markus Weinhardt, Wayne Luk
    posted to fpga hdl_tool high_level_synthesis by mmuecke on 2007-06-01 16:54:50 as **
  • notes The Design Warrior's Guide to FPGAs
    (12 April 2004)
    by Clive Maxfield
    posted to fpga by mmuecke on 2007-05-11 11:06:25 as **
  • Designing FPGA Circuits in Lava
    by S Singh, M Sheeran
    posted to fpga hdl by mmuecke on 2007-04-13 09:19:31 as ** along with 1 person SamB
  • notes Parallel algorithms development for programmable logic devices
    Adv. Eng. Softw., Vol. 37, No. 9. (September 2006), pp. 561-582.
    by Issam W Damaj
    posted to fpga functional high_level_synthesis parallel_algorithms parallel_programming by mmuecke on 2007-04-13 09:02:52 as **
  • notes Design and implementation of universal mathematical library supporting algorithm development for FPGA based systems in high energy physics experiments
    (2006)
    by Wojciech Jalmuzna
    posted to fixedpoint fpga fpgas_in_hep vhdl by mmuecke on 2007-03-21 11:25:53 as **
  • Revolution in electronic EDA education/research: GOSPL
    Microelectronic Systems Education, 2005. (MSE '05). Proceedings. 2005 IEEE International Conference on (2005), pp. 37-38.
    by R Sud, M Chaitanya
    posted to fpga hdl hdl_tool open_source_eda teaching by mmuecke on 2007-03-19 14:25:18 as **
  • Digital Signal Processing in Beam Instrumentation : Latest Trends and Typical Applications
    (May 2003)
    by Maria E Angoletta
    posted to fpga fpgas_in_hep survey trends by mmuecke on 2007-03-13 10:42:34 as **
  • notes Digital Signal Processing : State-of-the-Art at CERN and Recommendations
    (28 March 2002)
    by Maria E Angoletta, JL González, E Peschardt, J Serrano
    posted to fpga fpgas_in_hep survey by mmuecke on 2007-03-13 10:37:56 as **
  • Unified C/VHDL Model Generation of FPGA-based LHCb VELO algorithms
    (26 September 2006)
    by Manfred Muecke, Tomasz Szumlak
    posted to dsl fpga hdl lhcb by mmuecke on 2007-03-13 10:05:59 as read
  • LAMP: a tool suite for families of FPGA-based computational accelerators
    Field Programmable Logic and Applications, 2005. International Conference on (2005), pp. 612-617.
    by T Van Court, MC Herbordt
    posted to dsl fpga hdl high-performance_computing by mmuecke on 2007-03-08 12:04:35 as ** along with 1 person smithmc
  • notes Rigid Molecule Docking: FPGA Reconfiguration for Alternative Force Laws
    EURASIP Journal on Applied Signal Processing (2006)
    by Tom Vancourt, Yongfeng Gu, Vikas Mundada, Martin Herbordt
    posted to fpga molecular_docking by mmuecke on 2007-03-06 14:15:59 as **
  • Teaching reconfigurable systems: methods, tools, tutorials, and projects
    Education, IEEE Transactions on, Vol. 48, No. 2. (2005), pp. 290-300.
    by V Sklyarov, I Skliarova
    posted to fpga hdl teaching by mmuecke on 2007-03-06 13:13:51 as **
  • notes The softening of hardware
    Computer, Vol. 36, No. 4. (2003), pp. 27-34.
    by F Vahid
    posted to fpga hdl teaching trends by mmuecke on 2007-03-06 13:04:00 as ** along with 1 person gkontos
  • notes Accelerated image processing on FPGAs
    Image Processing, IEEE Transactions on, Vol. 12, No. 12. (2003), pp. 1543-1551.
    by BA Draper, JR Beveridge, APW Bohm, C Ross, M Chawathe
    posted to dsl fpga hdl high_level_synthesis image_processing parallel_programming survey by mmuecke on 2007-03-06 09:19:32 as ** along with 2 people gantlord Seenu
  • Implementing image applications on FPGAs
    Pattern Recognition, 2002. Proceedings. 16th International Conference on, Vol. 3 (2002), pp. 265-268 vol.3.
    by BA Draper, JR Beveridge, APW Bohm, C Ross, M Chawathe
    posted to dsl fpga hdl high_level_synthesis image_processing survey by mmuecke on 2007-03-06 09:16:30 as **
  • Hardware/software co-design
    Proceedings of the IEEE, Vol. 85, No. 3. (1997), pp. 349-365.
    by G De Michell, RK Gupta
    posted to fpga high_level_synthesis survey trends by mmuecke on 2007-03-05 15:10:31 as **
  • notes From application descriptions to hardware in seconds: a logic-based approach to bridging the gap
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 12, No. 4. (2004), pp. 420-436.
    by K Benkrid, D Crookes
    posted to dsl fpga hdl high_level_synthesis image_processing reconfigurable_platforms by mmuecke on 2007-03-05 14:56:54 as **
  • notes The LHCb DAQ interface board TELL1
    Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 560, No. 2. (10 May 2006), pp. 494-502.
    by G Haefeli, A Bay, A Gong, H Gong, M Muecke, N Neufeld, O Schneider
    posted to fpga high-performance_computing lhcb vhdl by mmuecke on 2007-02-22 17:16:31 as read
  • notes Nano/CMOS architectures using a field-programmable nanowire interconnect
    Nanotechnology, Vol. 18, No. 3. (2007)
    by Gregory S Snider, Stanley R Williams
    posted to fpga vlsi_design by mmuecke on 2007-02-22 11:35:34 as ** along with 1 person mpickett
  • notes SmartApps: middle-ware for adaptive applications on reconfigurable platforms
    SIGOPS Oper. Syst. Rev., Vol. 40, No. 2. (April 2006), pp. 73-82.
    by Lawrence Rauchwerger, Nancy M Amato
    posted to fpga middle_ware reconfigurable_platforms by mmuecke on 2007-02-21 15:40:18 as **
  • notes Accelerator design for protein sequence HMM search
    (2006), pp. 288-296.
    by Rahul P Maddimsetty, Jeremy Buhler, Roger D Chamberlain, Mark A Franklin, Brandon Harris
    posted to bioinformatics fpga protein_sequences by mmuecke on 2007-02-21 15:04:52 as **
  • Reconfigurable Systems: Past and Next 10 Years
    : Vector and Parallel Processing â VECPARâ98 (1999), pp. 334-354.
    by Jean Vuillemin
    posted to fpga fpgasupercomputing trends by mmuecke on 2007-02-19 13:14:24 as **
  • notes Occam on Field-Programmable Gate Arrays - Optimising for Performance
    (2000), pp. 227-238.
    by Roger MA Peel, Barry
    posted to fpga high_level_synthesis image_processing parallel_programming vhdl by mmuecke on 2007-02-15 16:57:08 as **
  • Hardware-accelerated analysis of non-protein-coding RNAs
    (2005)
    by Ola Snøve
    posted to bioinformatics fpga by mmuecke on 2007-02-15 16:43:07 as **
  • Real-time primer design for DNA chips
    Parallel and Distributed Processing Symposium, 2003. Proceedings. International (2003), 8 pp..
    by H Simmler, H Singpiel, R Manner
    posted to bioinformatics fpga by mmuecke on 2006-12-07 19:02:19 as **
  • An experimental study of optimizing bioinformatics applications
    Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International (2006), 8 pp..
    by Guangming Tan, Lin Xu, Shengzhong Feng, Ninghui Sun
    posted to bioinformatics fpga fpgasupercomputing by mmuecke on 2006-12-07 18:57:29 as ** along with 1 person smithmc
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