Exploring design space of parallel realizations: MPEG-2 decoder case study

by: Basant K Dwivedi, Jan Hoogerbrugge, Paul Stravers, M Balakrishnan

(2001), pp. 92-97.

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Abstract

Many applications lend them to parallelism at dierent levels of granularity. We rst identify the key issues involved in creating a parallel model of an application. These are done with a view to estimate performance and explore the "parallel " design space to select a suitable design point. The framework presented provides an opportunity to perform this exploration both in the target architecture independent and target architecture dependent manner. An MPEG-2 decoder model in YAPI has been presented which has more parallelism and improved performance. This model has further been mapped onto SpaceCAKE architecture to study its architectural parameters. Detailed results obtained with YAPI simulation (target architecture independent) and TSS simulation (after process-processor binding) on MPEG-2 decoder application establish the eectiveness of our approach.

@inproceedings{Dwivedi2001, abstract = {Many applications lend them to parallelism at dierent levels of granularity. We rst identify the key issues involved in creating a parallel model of an application. These are done with a view to estimate performance and explore the \&quot;parallel \&quot; design space to select a suitable design point. The framework presented provides an opportunity to perform this exploration both in the target architecture independent and target architecture dependent manner. An MPEG-2 decoder model in YAPI has been presented which has more parallelism and improved performance. This model has further been mapped onto SpaceCAKE architecture to study its architectural parameters. Detailed results obtained with YAPI simulation (target architecture independent) and TSS simulation (after process-processor binding) on MPEG-2 decoder application establish the eectiveness of our approach.}, author = {Dwivedi, Basant K. and Hoogerbrugge, Jan and Stravers, Paul and Balakrishnan, M. }, booktitle = {In Proc. CODES}, citeulike-article-id = {3089706}, pages = {92--97}, posted-at = {2008-08-05 22:50:27}, priority = {2}, title = {Exploring design space of parallel realizations: MPEG-2 decoder case study}, url = {http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.11.1075}, year = {2001} }

RIS record

TY - CONF ID - Dwivedi2001 L3 - citeulike-article-id:3089706 TI - Exploring design space of parallel realizations: MPEG-2 decoder case study T2 - In Proc. CODES SP - 92 EP - 97 N2 - Many applications lend them to parallelism at dierent levels of granularity. We rst identify the key issues involved in creating a parallel model of an application. These are done with a view to estimate performance and explore the &quot;parallel &quot; design space to select a suitable design point. The framework presented provides an opportunity to perform this exploration both in the target architecture independent and target architecture dependent manner. An MPEG-2 decoder model in YAPI has been presented which has more parallelism and improved performance. This model has further been mapped onto SpaceCAKE architecture to study its architectural parameters. Detailed results obtained with YAPI simulation (target architecture independent) and TSS simulation (after process-processor binding) on MPEG-2 decoder application establish the eectiveness of our approach. AU - Dwivedi, Basant AU - Hoogerbrugge, Jan AU - Stravers, Paul AU - Balakrishnan, M PY - 2001/// UR - http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.11.1075 ER -

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