An AMBA-ARM7 Formal Verification Platform Export

@incollection{citeulike:2353648, abstract = {The pressure to create a working System on Chip design as early as possible leads designers to consider using a platform based design method. In this approach, designing an application is a matter of selecting from a set of standard components with compatible specifications. Subsequently, a formal verification platform can be constructed. The formal verification platform provides an environment to analysed the combined properties of the design. In this paper, we present a methodology to do formal System on Chip analysis by developing generic formal components that can be integrated in a formal verification platform. First, we develop reusable formal properties of standard components. Second, we define a generic formal platform in which components of System on Chip design can be integrated. The platform contains basic components such as a standard bus protocol and a processor. Third, we combine the properties of standard components and obtain a set of refined properties of the system. We use these properties to develop the required specifications of the remaining components.}, author = {Susanto, Kong and Melham, Tom}, citeulike-article-id = {2353648}, citeulike-linkout-0 = {http://www.springerlink.com/content/h4cum39y87c411mx}, journal = {Formal Methods and Software Engineering}, keywords = {amba, arm, formal-methods, verification}, pages = {48--67}, posted-at = {2008-02-08 15:17:30}, priority = {2}, title = {An AMBA-ARM7 Formal Verification Platform}, url = {http://www.springerlink.com/content/h4cum39y87c411mx}, year = {2003} }

TY - CHAP ID - citeulike:2353648 L3 - citeulike-article-id:2353648 N2 - The pressure to create a working System on Chip design as early as possible leads designers to consider using a platform based design method. In this approach, designing an application is a matter of selecting from a set of standard components with compatible specifications. Subsequently, a formal verification platform can be constructed. The formal verification platform provides an environment to analysed the combined properties of the design. In this paper, we present a methodology to do formal System on Chip analysis by developing generic formal components that can be integrated in a formal verification platform. First, we develop reusable formal properties of standard components. Second, we define a generic formal platform in which components of System on Chip design can be integrated. The platform contains basic components such as a standard bus protocol and a processor. Third, we combine the properties of standard components and obtain a set of refined properties of the system. We use these properties to develop the required specifications of the remaining components. JF - Formal Methods and Software Engineering EP - 67 TI - An AMBA-ARM7 Formal Verification Platform SP - 48 KW - amba KW - arm KW - formal-methods KW - verification AU - Susanto, Kong AU - Melham, Tom PY - 2003/// UR - http://www.springerlink.com/content/h4cum39y87c411mx ER -