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Toward achieving energy efficiency in presence of deep submicron noise Export

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on In Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 8, No. 4. (2000), pp. 379-391.

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energy-analysis error-correction fault-tolerance interconnect

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Presented in this paper are: 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy efficiency in the presence of noise. In particular, lower bounds on a) circuit speed f<sub>c</sub> and supply voltage V<sub>dd</sub>; b) transition activity t in presence of noise; c) dynamic energy dissipation; and d) total (dynamic and static) energy dissipation are derived. A surprising result is that in a scenario where dynamic component of power dissipation dominates, the supply voltage for minimum energy operation (V<sub>dd, opt</sub>) is greater than the minimum supply voltage (V<sub>dd, min</sub>)for reliable operation. We then propose noise tolerance via coding to approach the lower bounds on energy dissipation. We show that the lower bounds on energy for an off-chip I/O signaling example are a factor of 24× below present day systems. A very simple Hamming code can reduce the energy consumption by a factor of 3×, while Reed-Muller (RM) codes give a 4× reduction in energy dissipation


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