mrsmond's ser [18 articles] Export

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	IBM Journal of Research and Development \| Vol. 52, No. 3, 2008 - Soft Errors in Circuits and Systems [My Copy] IBM Journal of Research and Development, Vol. 52, No. 3. (2008) posted to ser toread by mrsmond on 2008-12-15 16:58:14 as
	Impact of Technology and Voltage Scaling on the Soft Error Susceptibility in Nanoscale CMOS [My Copy] Defect and Fault Tolerance of VLSI Systems, 2008. DFTVS '08. IEEE International Symposium on In Defect and Fault Tolerance of VLSI Systems, 2008. DFTVS '08. IEEE International Symposium on (2008), pp. 114-122. by Vikas Chandra, Robert Aitken posted to arm circuit-level modeling ser trend by mrsmond on 2008-11-20 12:35:57 as
	Soft Error Mitigation Through Selective Addition of Functionally Redundant Wires [My Copy] Reliability, IEEE Transactions on In Reliability, IEEE Transactions on, Vol. 57, No. 1. (2008), pp. 23-31. by S. Almukhaizim, Y. Makris posted to circuit-level combinational-logic fault-injection ser seu by mrsmond on 2008-04-24 16:59:37 as
	A stimulus-free probabilistic model for single-event-upset sensitivity [My Copy] VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on In VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on (2006), 8 pp.. by Thara Rejimon, Sanjukta Bhanja posted to modeling ser seu static by mrsmond on 2007-10-31 17:12:37 as
	An efficient static algorithm for computing the soft error rates of combinational circuits [My Copy] In DATE '06: Proceedings of the conference on Design, automation and test in Europe (2006), pp. 164-169. by Rajeev R. Rao, Kaviraj Chopra, David Blaauw, Dennis Sylvester posted to combinational-logic modeling ser static by mrsmond on 2007-10-31 17:09:40 as
	Calculation of the soft error rate of submicron CMOS logic circuits [My Copy] Solid-State Circuits, IEEE Journal of In Solid-State Circuits, IEEE Journal of, Vol. 30, No. 7. (1995), pp. 830-834. by T. Juhnke, H. Klar posted to circuit ser simulation trend by mrsmond on 2007-10-25 16:32:42 as
	Analysis of single-event effects in combinational logic-simulation of the AM2901 bitslice processor [My Copy] Nuclear Science, IEEE Transactions on In Nuclear Science, IEEE Transactions on, Vol. 47, No. 6. (2000), pp. 2609-2615. by L. W. Massengill, A. E. Baranski, D. O. Van Nort, J. Meng, B. L. Bhuva posted to combinational-logic fault-analysis fault-injection ser simulation trend by mrsmond on 2007-10-25 16:30:05 as
	Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes [My Copy] IEEE Transactions on Dependable and Secure Computing, Vol. 01, No. 2. (2004), pp. 128-143. by Tanay Karnik, Peter Hazucha, Jagdish Patel posted to reliability review ser silicon-on-insulator by mrsmond on 2007-10-25 16:13:48 as
	Modeling Soft Errors at Device and Logic Level for combinational circuits [My Copy] IEEE Transactions on Dependable and Secure Computing (September 2007) by Rajaraman Ramanarayanan, Vijay S. Degalahal, Ramakrishnan Krishnan, et al.Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary J. Irwin, Kenan Unlu posted to combinational-logic modeling ser by mrsmond on 2007-10-25 16:05:42 as
	Impacts of front-end and middle-end process modifications on terrestrial soft error rate [My Copy] Device and Materials Reliability, IEEE Transactions on In Device and Materials Reliability, IEEE Transactions on, Vol. 5, No. 3. (2005), pp. 382-396. by P. Roche, G. Gasiot posted to manufacture-process neutron ser silicon-on-insulator toread by mrsmond on 2007-10-10 14:50:58 as
	Analytical semi-empirical model for SER sensitivity estimation of deep-submicron CMOS circuits [My Copy] On-Line Testing Symposium, 2005. IOLTS 2005. 11th IEEE International (2005), pp. 3-8. by T. Heijmen posted to ser simulation theory trend by mrsmond on 2007-07-05 11:24:41 as
	Soft error rates in deep-submicron CMOS technologies [My Copy] On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International (2006), 1 pp.. by T. Heijmen posted to ser toread trend by mrsmond on 2007-07-05 11:19:01 as along with 1 person Pepijn
	Prediction of transient induced by neutron/proton in CMOS combinational logic cells [My Copy] On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International (2006), 9 pp.. by G. Hubert, A. Bougerol, F. Miller, et al.N. Buard, L. Anghel, T. Carriere, F. Wrobel, R. Gaillard posted to combinational-logic fault-analysis neutron proton ser simulation transient-faults by mrsmond on 2007-07-04 14:04:42 as
	Radiation-Induced Soft Error Rates of Advanced CMOS Bulk Devices [My Copy] Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International In Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International (2006), pp. 217-225. by N. Seifert, P. Slankard, M. Kirsch, et al.B. Narasimham, V. Zia, C. Brookreson, A. Vo, S. Mitra, B. Gill, J. Maiz posted to importance--high ser shrinking trend by mrsmond on 2007-03-29 17:48:33 as along with 1 person naoya
	The effect of concrete shielding on cosmic ray induced soft fails in electronic systems [My Copy] Electron Devices, IEEE Transactions on, Vol. 28, No. 5. (1981), pp. 560-565. by J. F. Ziegler posted to importance--high ser trend by mrsmond on 2007-03-27 15:18:47 as
	Effect of Cosmic Rays on Computer Memories [My Copy] Science, Vol. 206, No. 4420. (16 November 1979), pp. 776-788. by J. F. Ziegler, W. A. Lanford posted to importance--high memory ser trend by mrsmond on 2007-03-26 15:21:00 as
	Alpha-particle-induced soft errors in dynamic memories [My Copy] Electron Devices, IEEE Transactions on, Vol. 26, No. 1. (1979), pp. 2-9. by T. C. May, M. H. Woods posted to soft-errors importance--seminal alpha-particles memory ser by mrsmond on 2007-03-26 14:55:17 as along with 2 people naoya qed2
	Modeling the effect of technology trends on the soft error rate of combinational logic [My Copy] Dependable Systems and Networks, 2002. Proceedings. International Conference on (2002), pp. 389-398. by P. Shivakumar, M. Kistler, S. W. Keckler, D. Burger, L. Alvisi posted to combinational-logic importance--high ser shrinking trend by mrsmond on 2006-10-16 16:15:49 as

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jabref-file-import-09-05-08	272
fault-tolerance	31
ser	18
modeling	17
reliability	17
architecture	16
trend	15
toread	14
combinational-logic	12
soft-errors	12
computer	11
review	11
transient-faults	11
engd	10
have-paper-copy	10
memory	10
randd-reading-group	10
seu	10
fault-analysis	9
fault-injection	9
not-related-to-engd	9
semiconductor	9
simulation	9
system-level	9
theory	9
variability	9
circuit-level	8
energy-analysis	8
on-chip-communication	8
importance--high	7
interconnect	7
physics	7
cpu	6
error-correction	6
fault-detection	6
microarchitecture	6
pers-reading-group	6
circuit	5
computing-history	5
design	5
dynamic-voltage-scaling	5
fault-avoidance	5
formal-methods	5
management	5
maths	5
network-on-chip	5
shrinking	5
verification	5
amba	4
arm	4
error-detection	4
importance--seminal	4
statistics	4
alpha-particles	3
business	3
computer-science	3
interesting-rating--1	3
interesting-rating--4	3
multiprocessor	3
neutron	3
razor	3
silicon	3
skim-read	3
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dependability	2
design-for-test	2
experiment	2
formal-logic	2
for--nafe	2
fpga	2
graph-theory	2
have-electronic-copy	2
ibm	2
interesting-rating--3	2
off-chip-communication	2
security	2
self-checking	2
silicon-on-insulator	2
software	2
static	2
tutorial	2
ageing	1
artificial-intelligence	1
automata-theory	1
automotive	1
availability	1
benchmarking	1
combinatorial-logic	1
combinatorics	1
compiler	1
computer-history	1
crosstalk	1
debug	1
electromigration	1
error	1
esd	1
evidence--important	1
evidence--interesting	1
future	1
gals	1
government	1
hardware	1
hci	1
importance-med	1
innovation	1
interesting-rating--2	1
intermittent-faults	1
manufacture-process	1
marketing	1
microcontroller	1
nanotech	1
organisation	1
planning	1
prj--fabric-reliability	1
proton	1
quantum-computing	1
ras	1
redundancy	1
servers	1
software-level	1
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super-computing	1
survey	1
testing	1
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mrsmond's ser [18 articles] Export

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