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An inherently linear and compact MOST-only current division technique Export

Solid-State Circuits, IEEE Journal of In Solid-State Circuits, IEEE Journal of, Vol. 27, No. 12. (1992), pp. 1730-1735.

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Foundational paper for current division used in Gen. 2 current bias.

rairighd (public note) - 2009-03-17 13:33:43

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A technique is presented for dividing currents accurately and linearly by using MOS transistors only. This technique is valid in all operating regions of an MOS transistor. With this technique, a volume control circuit is realized with an attenuation of 0 to -84 dB in steps of 2 dB. The measured THD is better than -85 dB and the dynamic range is better than 100 dB. The chip is realized in a standard digital CMOS process and chip area is 0.22 mm<sup>2</sup>


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