rblake's Torrellas:J [7 articles] Export

Recent papers posted to rblake's library by the author Torrellas:J. You can also see everyone's Torrellas:J.

	Evaluating the Performance of Cache-Affinity Scheduling in Shared-Memory Multiprocessors [My Copy] Journal of Parallel and Distributed Computing, Vol. 24, No. 2. (1995), pp. 139-151. by J. Torrellas, A. Tucker, A. Gupta posted to cs533 by rblake on 2008-04-17 15:40:04 as along with 1 person pousa
	The Memory Performance of DSS Commercial Workloads in Shared-Memory Multiprocessors [My Copy] In HPCA '97: Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (1997) by Pedro Trancoso, Josep-L, Zheng Zhang, Josep Torrellas posted to cs533 by rblake on 2008-04-08 15:00:19 as
	Characterizing the caching and synchronization performance of a multiprocessor operating system [My Copy] In ASPLOS-V: Proceedings of the fifth international conference on Architectural support for programming languages and operating systems (1992), pp. 162-174. by Josep Torrellas, Anoop Gupta, John Hennessy posted to cs533 by rblake on 2008-04-08 14:57:35 as
	ReVive: cost-effective architectural support for rollback recovery in shared-memory multiprocessors [My Copy] In ISCA '02: Proceedings of the 29th annual international symposium on Computer architecture (2002), pp. 111-122. by Milos Prvulovic, Zheng Zhang, Josep Torrellas posted to cs533 by rblake on 2008-04-01 06:46:22 as along with 1 person rhishi
	Speculative Synchronization: Applying Thread-Level Speculation to Explicitly Parallel Applications [My Copy] In International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (October 2002), pp. 18-29. by José F. Martinez, Josep Torrellas posted to cs533 by rblake on 2008-03-13 14:40:46 as
	A Chip-Multiprocessor Architecture with Speculative Multithreading [My Copy] IEEE Trans. Comput., Vol. 48, No. 9. (September 1999), pp. 866-880. by Venkata Krishnan, Josep Torrellas posted to cs533 by rblake on 2008-03-04 03:44:27 as
	Using a user-level memory thread for correlation prefetching [My Copy] In ISCA '02: Proceedings of the 29th annual international symposium on Computer architecture (2002), pp. 171-182. by Yan Solihin, Jaejin Lee, Josep Torrellas posted to cs533 by rblake on 2008-02-12 15:33:54 as

Note: You may cite this page as: http://www.citeulike.org/user/rblake/author/Torrellas:J

cs533	34
parallel	32
algorithm	19
scientificcomputing	19
amg	12
softwareengineering	12
fft	11
20070505_cs550project	9
linearalgebra	7
cg	5
cep	4
chaoticrelaxation	4
fem	4
analysis	3
markov	3
metascience	3
ode	3
arithmetic	2
coarsening	2
debug	2
gaussianelimination	2
graph	2
me	2
mg	2
pde	2
performance	2
preconditioning	2
scm	2
softwareevolution	2
spd	2
stiffness	2
writing	2
additive	1
afmining	1
bidomain	1
bsp	1
burgers	1
cell_model	1
cfd	1
citation	1
compgeom	1
compilers	1
conservation	1
database	1
distributed	1
domaindecomposition	1
electromechanicalfeedback	1
exponential	1
faulttolerance	1
grid	1
informationtheory	1
interpolation	1
java	1
krylov	1
linux	1
logp	1
master_equation	1
matrix	1
meshless	1
moleculardynamics	1
multigrid	1
obvious	1
order	1
oss	1
p2p	1
patch	1
patternmatching	1
pmis	1
preconditioner	1
rapiddevelopment	1
schwarz	1
socialnetworks	1
splines	1
subliminal	1
syntactic	1
time	1
vision	1
visualization	1

rblake's Torrellas:J [7 articles] Export

rblake's tags