FPGA implementation of Radix-2²pipelined FFT processor Export

@inproceedings{citeulike:5684238, abstract = {The Fast Fourier Transform (FFT) is very important algorithm in signal processing, software-defined radio, and wireless communication. This paper explains the realization of radix-2 2 single-path delay feedback pipelined FFT processor. This architecture has the same multiplicative complexity as radix-4 algorithm, but retains the simple butterfly structure of radix-2 algorithm. The implementation was made on a Field Programmable Gate Array (FPGA) because it can achieve higher computing speed than digital signal processors (DSPs), and also can achieve cost effectively ASIC-like performance with lower development time, and risks. The processor has been developed using hardware description language VHDL and simulated up to 465 MHz on an Xilinx xc5vsx35t for transformation length 256-point.}, address = {Stevens Point, Wisconsin, USA}, author = {Saeed, Ahmed and Elbably, M. and Abdelfadeel, G. and Eladawy, M. I.}, booktitle = {WAV'09: Proceedings of the 3rd WSEAS international symposium on Wavelets theory and applications in applied mathematics, signal processing \& modern science}, citeulike-article-id = {5684238}, citeulike-linkout-0 = {http://portal.acm.org/citation.cfm?id=1561963.1561982}, isbn = {978-960-474-086-4}, keywords = {fft, fpga, radix-22}, location = {Istanbul, Turkey}, pages = {109--114}, posted-at = {2009-08-30 02:25:38}, priority = {5}, publisher = {World Scientific and Engineering Academy and Society (WSEAS)}, title = {FPGA implementation of Radix-2²pipelined FFT processor}, url = {http://portal.acm.org/citation.cfm?id=1561963.1561982}, year = {2009} }

TY - CONF ID - citeulike:5684238 L3 - citeulike-article-id:5684238 N2 - The Fast Fourier Transform (FFT) is very important algorithm in signal processing, software-defined radio, and wireless communication. This paper explains the realization of radix-2 2 single-path delay feedback pipelined FFT processor. This architecture has the same multiplicative complexity as radix-4 algorithm, but retains the simple butterfly structure of radix-2 algorithm. The implementation was made on a Field Programmable Gate Array (FPGA) because it can achieve higher computing speed than digital signal processors (DSPs), and also can achieve cost effectively ASIC-like performance with lower development time, and risks. The processor has been developed using hardware description language VHDL and simulated up to 465 MHz on an Xilinx xc5vsx35t for transformation length 256-point. CY - Istanbul, Turkey SN - 978-960-474-086-4 AD - Stevens Point, Wisconsin, USA EP - 114 TI - FPGA implementation of Radix-2²pipelined FFT processor PB - World Scientific and Engineering Academy and Society (WSEAS) T2 - WAV'09: Proceedings of the 3rd WSEAS international symposium on Wavelets theory and applications in applied mathematics, signal processing & modern science SP - 109 KW - fft KW - fpga KW - radix-22 AU - Saeed, Ahmed AU - Elbably, M AU - Abdelfadeel, G AU - Eladawy, MI PY - 2009/// UR - http://portal.acm.org/citation.cfm?id=1561963.1561982 ER -