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An FPGA based Adaptive Weightless Neural Network Hardware

by: P. Lorrentz, G. Howells, K. McDonald-Maier
In Adaptive Hardware and Systems, 2008. AHS '08. NASA/ESA Conference on (June 2008), pp. 220-227, doi:10.1109/ahs.2008.19  Key: citeulike:11443152

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Abstract

This paper explores the significant practical difficulties inherent in mapping large artificial neural structures onto digital hardware. Specifically, a class of weightless neural architecture called the enhanced probabilistic convergent network is examined due to the inherent simplicity of the control algorithms associated with the architecture. The advantages for such an approach follow from the observation that, for many situations for which an intelligent machine requires very fast, unmanned, and uninterrupted responses, a PC-based system is unsuitable especially in electronically harsh and isolated conditions, The target architecture for the design is an FPGA, the Virtex-II pro which is statically and dynamically reconfigurable, enhancing its suitability for an adaptive weightless neural networks. This hardware is tested on a benchmark of unconstrained handwritten numbers from the National Institute Of Standards And Technology (NIST), USA.


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