Multitasking workload scheduling on flexible-core chip multiprocessors Export

@inproceedings{citeulike:3831013, abstract = {While technology trends have ushered in the age of chip multiprocessors (CMP), a fundamental question is what size to make each core. Most current commercial designs are symmetric CMPs (SCMP) in which each core is identical and range from a simple RISC processor to a complex out-of-order x86 processor. Some researchers have proposed asymmetric CMPs (ACMP) consisting of multiple types of cores. While less of an issue for ACMPs, the fixed nature of both these architectures makes them vulnerable to mismatches between the granularity of the cores and the parallelism in the workload, which can cause inefficient execution. To remedy this weakness, recent research has proposed flexible-core CMPs (FCMP), which have the capability of aggregating multiple small processing cores to form larger logical processors. FCMPs introduce a new resource allocation and scheduling problem which must determine how many logical processors should be configured, how powerful each processor should be, and where/when each task should run. This paper introduces and motivates this problem, describes the challenges associated with it, and evaluates algorithms appropriate for multitasking on FCMPs. We also evaluate static-core CMPs of various configurations and compare them to FCMPs for various multitasking workloads.}, address = {New York, NY, USA}, author = {Gulati, Divya P. and Kim, Changkyu and Sethumadhavan, Simha and Keckler, Stephen W. and Burger, Doug}, booktitle = {PACT '08: Proceedings of the 17th international conference on Parallel architectures and compilation techniques}, citeulike-article-id = {3831013}, citeulike-linkout-0 = {http://portal.acm.org/citation.cfm?id=1454115.1454142}, citeulike-linkout-1 = {http://dx.doi.org/10.1145/1454115.1454142}, doi = {10.1145/1454115.1454142}, isbn = {978-1-60558-282-5}, keywords = {manycore-os}, location = {Toronto, Ontario, Canada}, pages = {187--196}, posted-at = {2009-10-29 17:15:34}, priority = {2}, publisher = {ACM}, title = {Multitasking workload scheduling on flexible-core chip multiprocessors}, url = {http://dx.doi.org/10.1145/1454115.1454142}, year = {2008} }

TY - CONF ID - citeulike:3831013 L3 - citeulike-article-id:3831013 N2 - While technology trends have ushered in the age of chip multiprocessors (CMP), a fundamental question is what size to make each core. Most current commercial designs are symmetric CMPs (SCMP) in which each core is identical and range from a simple RISC processor to a complex out-of-order x86 processor. Some researchers have proposed asymmetric CMPs (ACMP) consisting of multiple types of cores. While less of an issue for ACMPs, the fixed nature of both these architectures makes them vulnerable to mismatches between the granularity of the cores and the parallelism in the workload, which can cause inefficient execution. To remedy this weakness, recent research has proposed flexible-core CMPs (FCMP), which have the capability of aggregating multiple small processing cores to form larger logical processors. FCMPs introduce a new resource allocation and scheduling problem which must determine how many logical processors should be configured, how powerful each processor should be, and where/when each task should run. This paper introduces and motivates this problem, describes the challenges associated with it, and evaluates algorithms appropriate for multitasking on FCMPs. We also evaluate static-core CMPs of various configurations and compare them to FCMPs for various multitasking workloads. CY - Toronto, Ontario, Canada SN - 978-1-60558-282-5 AD - New York, NY, USA EP - 196 TI - Multitasking workload scheduling on flexible-core chip multiprocessors PB - ACM T2 - PACT '08: Proceedings of the 17th international conference on Parallel architectures and compilation techniques SP - 187 KW - manycore-os AU - Gulati, Divya AU - Kim, Changkyu AU - Sethumadhavan, Simha AU - Keckler, Stephen AU - Burger, Doug PY - 2008/// UR - http://dx.doi.org/10.1145/1454115.1454142 ER -