Centip3De: A 64-Core, 3D Stacked, Near-Threshold System

Process scaling has resulted in exponential growth of the number of transistors available to designers. Meanwhile, global interconnect has not scaled nearly as well since global wires scale in only one dimension instead of two, resulting in fewer, high resistance routing tracks. Three-dimensional (3D) integration seeks to address the global interconnect scaling issue by adding multiple layers of silicon with vertical interconnect between them, typically in the form of through-silicon vias (TSVs). Since global interconnect can be millimeters long, and silicon layers tend to be only tens of microns thick in 3D stacked processes, the power and performance gains by using vertical interconnect can be substantial. To address the thermal issues that arise with 3D integration this paper explores the use of near-threshold computing---operating the system at a supply voltage just above the threshold voltage of the transistors. In this paper we will discuss the design and test of Centip3De, a large-scale 3D-stacked near-threshold chip multi-processor. Centip3De uses Tezzaron's 3D stacking technology in conjunction with Global Foundries 130nm process. The Centip3De design is comprised of 128 ARM Cortex-M3 cores and 256MB of integrated DRAM, and silicon measurements are presented for a 64-core version of the design.