A 31.5 dBm CMOS RF Doherty Power Amplifier for Wireless Communications Export

@article{Wongkomet:2006, abstract = {A fully differential Doherty power amplifier (PA) is implemented in a 0.13-mum CMOS technology. The prototype achieves a maximum output power of +31.5 dBm with a peak power-added efficiency (PAE) of 36\% (39\% drain efficiency) with a GMSK modulated signal. The PAE is kept above 18\% over a 10 dB range of output power. With a GSM/EDGE input signal, the measured peak output power while still meeting the GSM/EDGE mask and error vector magnitude (EVM) requirements is +25dBm with a peak PAE of 13\% (PAE is 6\% at 12 dB back-off). Instead of using a bulky lambda/4 transmission line, a passive impedance inverter is implemented as a compact lumped-element network. All circuit components are fully integrated on a single CMOS die except for an off-chip capacitor for output matching and baluns. The die size is 2.8times3.2mm² including all pads and bypass capacitors}, author = {Wongkomet, N. and Tee, L. and Gray, P. R.}, citeulike-article-id = {6086710}, citeulike-linkout-0 = {http://dx.doi.org/10.1109/JSSC.2006.884832}, citeulike-linkout-1 = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4014639}, day = {20}, doi = {10.1109/JSSC.2006.884832}, journal = {Solid-State Circuits, IEEE Journal of}, keywords = {cmos, doherty, power-amplifier, rfic}, month = {November}, number = {12}, pages = {2852--2859}, posted-at = {2009-11-08 22:40:32}, priority = {2}, title = {A 31.5 dBm CMOS RF Doherty Power Amplifier for Wireless Communications}, url = {http://dx.doi.org/10.1109/JSSC.2006.884832}, volume = {41}, year = {2006} }

TY - JOUR ID - Wongkomet:2006 L3 - citeulike-article-id:6086710 N2 - A fully differential Doherty power amplifier (PA) is implemented in a 0.13-mum CMOS technology. The prototype achieves a maximum output power of +31.5 dBm with a peak power-added efficiency (PAE) of 36% (39% drain efficiency) with a GMSK modulated signal. The PAE is kept above 18% over a 10 dB range of output power. With a GSM/EDGE input signal, the measured peak output power while still meeting the GSM/EDGE mask and error vector magnitude (EVM) requirements is +25dBm with a peak PAE of 13% (PAE is 6% at 12 dB back-off). Instead of using a bulky lambda/4 transmission line, a passive impedance inverter is implemented as a compact lumped-element network. All circuit components are fully integrated on a single CMOS die except for an off-chip capacitor for output matching and baluns. The die size is 2.8times3.2mm² including all pads and bypass capacitors IS - 12 JF - Solid-State Circuits, IEEE Journal of EP - 2859 TI - A 31.5 dBm CMOS RF Doherty Power Amplifier for Wireless Communications VL - 41 SP - 2852 KW - cmos KW - doherty KW - power-amplifier KW - rfic AU - Wongkomet, N AU - Tee, L AU - Gray, PR PY - 2006/11/20/ UR - http://dx.doi.org/10.1109/JSSC.2006.884832 ER -